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[/] [ps2/] [tags/] [asyst_2/] [rtl/] [verilog/] [ps2_top.v] - Blame information for rev 51

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Line No. Rev Author Line
1 2 mihad
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
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////  ps2_top.v                                                   ////
4
////                                                              ////
5
////  This file is part of the "ps2" project                      ////
6
////  http://www.opencores.org/cores/ps2/                         ////
7
////                                                              ////
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////  Author(s):                                                  ////
9
////      - mihad@opencores.org                                   ////
10
////      - Miha Dolenc                                           ////
11
////                                                              ////
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////  All additional information is avaliable in the README.txt   ////
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////  file.                                                       ////
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////                                                              ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2000 Miha Dolenc, mihad@opencores.org          ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
42
//
43
// CVS Revision History
44
//
45
// $Log: not supported by cvs2svn $
46 24 primozs
// Revision 1.5  2003/06/30 15:29:27  simons
47
// Error fixed again.
48
//
49 21 simons
// Revision 1.4  2003/06/30 15:25:45  simons
50
// Error fixed.
51
//
52 19 simons
// Revision 1.3  2003/05/28 16:27:09  simons
53
// Change the address width.
54
//
55 15 simons
// Revision 1.2  2002/04/09 13:21:15  mihad
56
// Added mouse interface and everything for its handling, cleaned up some unused code
57
//
58 13 mihad
// Revision 1.1.1.1  2002/02/18 16:16:56  mihad
59
// Initial project import - working
60 2 mihad
//
61 13 mihad
//
62 2 mihad
 
63
`include "ps2_defines.v"
64
// synopsys translate_off
65
`include "timescale.v"
66
// synopsys translate_on
67
 
68
module ps2_top
69
(
70
    wb_clk_i,
71
    wb_rst_i,
72
    wb_cyc_i,
73
    wb_stb_i,
74
    wb_we_i,
75
    wb_sel_i,
76
    wb_adr_i,
77
    wb_dat_i,
78
    wb_dat_o,
79
    wb_ack_o,
80
 
81 13 mihad
    wb_int_o,
82
 
83 2 mihad
    ps2_kbd_clk_pad_i,
84
    ps2_kbd_data_pad_i,
85
    ps2_kbd_clk_pad_o,
86
    ps2_kbd_data_pad_o,
87
    ps2_kbd_clk_pad_oe_o,
88
    ps2_kbd_data_pad_oe_o
89 13 mihad
    `ifdef PS2_AUX
90
    ,
91
    wb_intb_o,
92
 
93
    ps2_aux_clk_pad_i,
94
    ps2_aux_data_pad_i,
95
    ps2_aux_clk_pad_o,
96
    ps2_aux_data_pad_o,
97
    ps2_aux_clk_pad_oe_o,
98
    ps2_aux_data_pad_oe_o
99
    `endif
100 2 mihad
) ;
101
 
102
input wb_clk_i,
103
      wb_rst_i,
104
      wb_cyc_i,
105
      wb_stb_i,
106
      wb_we_i ;
107
 
108
input [3:0] wb_sel_i ;
109
 
110 24 primozs
input [3:0] wb_adr_i ;
111 19 simons
input [31:0] wb_dat_i ;
112 2 mihad
 
113
output [31:0] wb_dat_o ;
114
 
115
output wb_ack_o ;
116
 
117
output wb_int_o ;
118
 
119
input ps2_kbd_clk_pad_i,
120
      ps2_kbd_data_pad_i ;
121
 
122
output ps2_kbd_clk_pad_o,
123
       ps2_kbd_data_pad_o,
124
       ps2_kbd_clk_pad_oe_o,
125
       ps2_kbd_data_pad_oe_o ;
126
 
127 13 mihad
`ifdef PS2_AUX
128
output wb_intb_o ;
129
input ps2_aux_clk_pad_i,
130
      ps2_aux_data_pad_i ;
131
 
132
output ps2_aux_clk_pad_o,
133
       ps2_aux_data_pad_o,
134
       ps2_aux_clk_pad_oe_o,
135
       ps2_aux_data_pad_oe_o ;
136
 
137
assign ps2_aux_clk_pad_o  = 1'b0 ;
138
assign ps2_aux_data_pad_o = 1'b0 ;
139
`endif
140
 
141
wire rx_released,
142
     rx_kbd_data_ready,
143 2 mihad
     rx_translated_data_ready,
144 13 mihad
     rx_kbd_read_wb,
145
     rx_kbd_read_tt,
146
     tx_kbd_write,
147
     tx_kbd_write_ack,
148 2 mihad
     tx_error_no_keyboard_ack,
149
     ps2_ctrl_kbd_data_en_,
150
     ps2_ctrl_kbd_clk_en_,
151
     ps2_ctrl_kbd_clk,
152
     inhibit_kbd_if ;
153
 
154 24 primozs
wire [15:0] devide_reg;
155
 
156 13 mihad
wire [7:0] rx_scan_code,
157 2 mihad
           rx_translated_scan_code,
158 13 mihad
           tx_kbd_data ;
159 2 mihad
 
160
assign ps2_kbd_clk_pad_o  = 1'b0 ;
161
assign ps2_kbd_data_pad_o = 1'b0 ;
162
 
163 13 mihad
ps2_io_ctrl i_ps2_io_ctrl_keyboard
164 2 mihad
(
165 13 mihad
    .clk_i               (wb_clk_i),
166
    .rst_i               (wb_rst_i),
167
    .ps2_ctrl_clk_en_i_  (ps2_ctrl_kbd_clk_en_),
168
    .ps2_ctrl_data_en_i_ (ps2_ctrl_kbd_data_en_),
169
    .ps2_clk_pad_i       (ps2_kbd_clk_pad_i),
170
    .ps2_clk_pad_oe_o    (ps2_kbd_clk_pad_oe_o),
171
    .ps2_data_pad_oe_o   (ps2_kbd_data_pad_oe_o),
172
    .inhibit_if_i        (inhibit_kbd_if),
173
    .ps2_ctrl_clk_o      (ps2_ctrl_kbd_clk)
174 2 mihad
);
175
 
176 13 mihad
`ifdef PS2_AUX
177
wire rx_aux_data_ready,
178
     rx_aux_read,
179
     tx_aux_write,
180
     tx_aux_write_ack,
181
     tx_error_no_aux_ack,
182
     ps2_ctrl_aux_data_en_,
183
     ps2_ctrl_aux_clk_en_,
184
     ps2_ctrl_aux_clk,
185
     inhibit_aux_if ;
186
 
187
wire [7:0] rx_aux_data,
188
           tx_aux_data ;
189
 
190
ps2_io_ctrl i_ps2_io_ctrl_auxiliary
191
(
192
    .clk_i               (wb_clk_i),
193
    .rst_i               (wb_rst_i),
194
    .ps2_ctrl_clk_en_i_  (ps2_ctrl_aux_clk_en_),
195
    .ps2_ctrl_data_en_i_ (ps2_ctrl_aux_data_en_),
196
    .ps2_clk_pad_i       (ps2_aux_clk_pad_i),
197
    .ps2_clk_pad_oe_o    (ps2_aux_clk_pad_oe_o),
198
    .ps2_data_pad_oe_o   (ps2_aux_data_pad_oe_o),
199
    .inhibit_if_i        (inhibit_aux_if),
200
    .ps2_ctrl_clk_o      (ps2_ctrl_aux_clk)
201
);
202
 
203
ps2_mouse #(`PS2_TIMER_60USEC_VALUE_PP, `PS2_TIMER_60USEC_BITS_PP, `PS2_TIMER_5USEC_VALUE_PP, `PS2_TIMER_5USEC_BITS_PP)
204
i_ps2_mouse
205
(
206
    .clk                         (wb_clk_i),
207
    .reset                       (wb_rst_i),
208
    .ps2_clk_en_o_               (ps2_ctrl_aux_clk_en_),
209
    .ps2_data_en_o_              (ps2_ctrl_aux_data_en_),
210
    .ps2_clk_i                   (ps2_ctrl_aux_clk),
211
    .ps2_data_i                  (ps2_aux_data_pad_i),
212
    .rx_scan_code                (rx_aux_data),
213
    .rx_data_ready               (rx_aux_data_ready),
214
    .rx_read                     (rx_aux_read),
215
    .tx_data                     (tx_aux_data),
216
    .tx_write                    (tx_aux_write),
217
    .tx_write_ack_o              (tx_aux_write_ack),
218 24 primozs
    .tx_error_no_ack             (tx_error_no_aux_ack),
219
    .devide_reg_i                (devide_reg)
220 13 mihad
);
221
 
222
`endif
223
 
224
ps2_keyboard #(`PS2_TIMER_60USEC_VALUE_PP, `PS2_TIMER_60USEC_BITS_PP, `PS2_TIMER_5USEC_VALUE_PP, `PS2_TIMER_5USEC_BITS_PP)
225 2 mihad
i_ps2_keyboard
226
(
227
    .clk                         (wb_clk_i),
228
    .reset                       (wb_rst_i),
229
    .ps2_clk_en_o_               (ps2_ctrl_kbd_clk_en_),
230
    .ps2_data_en_o_              (ps2_ctrl_kbd_data_en_),
231
    .ps2_clk_i                   (ps2_ctrl_kbd_clk),
232
    .ps2_data_i                  (ps2_kbd_data_pad_i),
233
    .rx_released                 (rx_released),
234
    .rx_scan_code                (rx_scan_code),
235 13 mihad
    .rx_data_ready               (rx_kbd_data_ready),
236
    .rx_read                     (rx_kbd_read_tt),
237
    .tx_data                     (tx_kbd_data),
238
    .tx_write                    (tx_kbd_write),
239
    .tx_write_ack_o              (tx_kbd_write_ack),
240 2 mihad
    .tx_error_no_keyboard_ack    (tx_error_no_keyboard_ack),
241 24 primozs
    .translate                   (translate),
242
    .devide_reg_i                (devide_reg)
243 2 mihad
);
244
 
245
ps2_wb_if i_ps2_wb_if
246
(
247
    .wb_clk_i                      (wb_clk_i),
248
    .wb_rst_i                      (wb_rst_i),
249
    .wb_cyc_i                      (wb_cyc_i),
250
    .wb_stb_i                      (wb_stb_i),
251
    .wb_we_i                       (wb_we_i),
252
    .wb_sel_i                      (wb_sel_i),
253
    .wb_adr_i                      (wb_adr_i),
254
    .wb_dat_i                      (wb_dat_i),
255
    .wb_dat_o                      (wb_dat_o),
256
    .wb_ack_o                      (wb_ack_o),
257 13 mihad
 
258 2 mihad
    .wb_int_o                      (wb_int_o),
259 13 mihad
 
260 24 primozs
    .devide_reg_o                  (devide_reg),
261
 
262 2 mihad
    .rx_scancode_i                 (rx_translated_scan_code),
263 13 mihad
    .rx_kbd_data_ready_i           (rx_translated_data_ready),
264
    .rx_kbd_read_o                 (rx_kbd_read_wb),
265
    .tx_kbd_data_o                 (tx_kbd_data),
266
    .tx_kbd_write_o                (tx_kbd_write),
267
    .tx_kbd_write_ack_i            (tx_kbd_write_ack),
268 2 mihad
    .translate_o                   (translate),
269 13 mihad
    .ps2_kbd_clk_i                 (ps2_kbd_clk_pad_i),
270 2 mihad
    .inhibit_kbd_if_o              (inhibit_kbd_if)
271 13 mihad
    `ifdef PS2_AUX
272
    ,
273
    .wb_intb_o                     (wb_intb_o),
274
 
275
    .rx_aux_data_i                 (rx_aux_data),
276
    .rx_aux_data_ready_i           (rx_aux_data_ready),
277
    .rx_aux_read_o                 (rx_aux_read),
278
    .tx_aux_data_o                 (tx_aux_data),
279
    .tx_aux_write_o                (tx_aux_write),
280
    .tx_aux_write_ack_i            (tx_aux_write_ack),
281
    .ps2_aux_clk_i                 (ps2_aux_clk_pad_i),
282
    .inhibit_aux_if_o              (inhibit_aux_if)
283
    `endif
284 2 mihad
) ;
285
 
286
ps2_translation_table i_ps2_translation_table
287
(
288
    .reset_i                    (wb_rst_i),
289
    .clock_i                    (wb_clk_i),
290
    .translate_i                (translate),
291
    .code_i                     (rx_scan_code),
292
    .code_o                     (rx_translated_scan_code),
293
    .address_i                  (8'h00),
294
    .data_i                     (8'h00),
295
    .we_i                       (1'b0),
296
    .re_i                       (1'b0),
297
    .data_o                     (),
298 13 mihad
    .rx_data_ready_i            (rx_kbd_data_ready),
299 2 mihad
    .rx_translated_data_ready_o (rx_translated_data_ready),
300 13 mihad
    .rx_read_i                  (rx_kbd_read_wb),
301
    .rx_read_o                  (rx_kbd_read_tt),
302
    .rx_released_i              (rx_released)
303 2 mihad
) ;
304
 
305
endmodule // ps2_top

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