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[/] [ps2/] [tags/] [rel_14/] [rtl/] [verilog/] [ps2_io_ctrl.v] - Blame information for rev 51

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1 2 mihad
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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////  ps2_io_ctrl.v                                               ////
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////                                                              ////
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////  This file is part of the "ps2" project                      ////
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////  http://www.opencores.org/cores/ps2/                         ////
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////                                                              ////
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////  Author(s):                                                  ////
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////      - mihad@opencores.org                                   ////
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////      - Miha Dolenc                                           ////
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////                                                              ////
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////  All additional information is avaliable in the README.txt   ////
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////  file.                                                       ////
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////                                                              ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2000 Miha Dolenc, mihad@opencores.org          ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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//
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// CVS Revision History
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//
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// $Log: not supported by cvs2svn $
46 13 mihad
// Revision 1.1.1.1  2002/02/18 16:16:56  mihad
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// Initial project import - working
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//
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//
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// synopsys translate_off
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`include "timescale.v"
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// synopsys translate_on
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module ps2_io_ctrl
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(
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    clk_i,
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    rst_i,
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    ps2_ctrl_clk_en_i_,
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    ps2_ctrl_data_en_i_,
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    ps2_clk_pad_i,
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    ps2_clk_pad_oe_o,
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    ps2_data_pad_oe_o,
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    inhibit_if_i,
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    ps2_ctrl_clk_o
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);
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input clk_i,
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      rst_i,
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      ps2_ctrl_clk_en_i_,
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      ps2_ctrl_data_en_i_,
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      ps2_clk_pad_i,
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      inhibit_if_i ;
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output ps2_clk_pad_oe_o,
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       ps2_data_pad_oe_o,
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       ps2_ctrl_clk_o ;
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reg    ps2_clk_pad_oe_o,
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       ps2_data_pad_oe_o ;
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always@(posedge clk_i or posedge rst_i)
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begin
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    if ( rst_i )
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    begin
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        ps2_clk_pad_oe_o  <= #1 1'b0 ;
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        ps2_data_pad_oe_o <= #1 1'b0 ;
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    end
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    else
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    begin
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        ps2_clk_pad_oe_o  <= #1 !ps2_ctrl_clk_en_i_ || inhibit_if_i ;
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        ps2_data_pad_oe_o <= #1 !ps2_ctrl_data_en_i_ ;
93 2 mihad
    end
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end
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reg inhibit_if_previous ;
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always@(posedge clk_i or posedge rst_i)
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begin
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    if ( rst_i )
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        inhibit_if_previous <= #1 1'b1 ;
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    else
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        inhibit_if_previous <= #1 inhibit_if_i ;
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end
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105 13 mihad
assign ps2_ctrl_clk_o = ps2_clk_pad_i || ps2_clk_pad_oe_o && inhibit_if_previous ;
106 2 mihad
endmodule // ps2_io_ctrl

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