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[/] [ps2/] [tags/] [rel_14/] [rtl/] [verilog/] [ps2_top.v] - Blame information for rev 13

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1 2 mihad
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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////  ps2_top.v                                                   ////
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////                                                              ////
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////  This file is part of the "ps2" project                      ////
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////  http://www.opencores.org/cores/ps2/                         ////
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////                                                              ////
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////  Author(s):                                                  ////
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////      - mihad@opencores.org                                   ////
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////      - Miha Dolenc                                           ////
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////                                                              ////
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////  All additional information is avaliable in the README.txt   ////
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////  file.                                                       ////
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////                                                              ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2000 Miha Dolenc, mihad@opencores.org          ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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//
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// CVS Revision History
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//
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// $Log: not supported by cvs2svn $
46 13 mihad
// Revision 1.1.1.1  2002/02/18 16:16:56  mihad
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// Initial project import - working
48 2 mihad
//
49 13 mihad
//
50 2 mihad
 
51
`include "ps2_defines.v"
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// synopsys translate_off
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`include "timescale.v"
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// synopsys translate_on
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56
module ps2_top
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(
58
    wb_clk_i,
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    wb_rst_i,
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    wb_cyc_i,
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    wb_stb_i,
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    wb_we_i,
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    wb_sel_i,
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    wb_adr_i,
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    wb_dat_i,
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    wb_dat_o,
67
    wb_ack_o,
68
 
69 13 mihad
    wb_int_o,
70
 
71 2 mihad
    ps2_kbd_clk_pad_i,
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    ps2_kbd_data_pad_i,
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    ps2_kbd_clk_pad_o,
74
    ps2_kbd_data_pad_o,
75
    ps2_kbd_clk_pad_oe_o,
76
    ps2_kbd_data_pad_oe_o
77 13 mihad
    `ifdef PS2_AUX
78
    ,
79
    wb_intb_o,
80
 
81
    ps2_aux_clk_pad_i,
82
    ps2_aux_data_pad_i,
83
    ps2_aux_clk_pad_o,
84
    ps2_aux_data_pad_o,
85
    ps2_aux_clk_pad_oe_o,
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    ps2_aux_data_pad_oe_o
87
    `endif
88 2 mihad
) ;
89
 
90
input wb_clk_i,
91
      wb_rst_i,
92
      wb_cyc_i,
93
      wb_stb_i,
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      wb_we_i ;
95
 
96
input [3:0] wb_sel_i ;
97
 
98 13 mihad
input [31:0]wb_adr_i,
99 2 mihad
            wb_dat_i ;
100
 
101
output [31:0] wb_dat_o ;
102
 
103
output wb_ack_o ;
104
 
105
output wb_int_o ;
106
 
107
input ps2_kbd_clk_pad_i,
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      ps2_kbd_data_pad_i ;
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110
output ps2_kbd_clk_pad_o,
111
       ps2_kbd_data_pad_o,
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       ps2_kbd_clk_pad_oe_o,
113
       ps2_kbd_data_pad_oe_o ;
114
 
115 13 mihad
`ifdef PS2_AUX
116
output wb_intb_o ;
117
input ps2_aux_clk_pad_i,
118
      ps2_aux_data_pad_i ;
119
 
120
output ps2_aux_clk_pad_o,
121
       ps2_aux_data_pad_o,
122
       ps2_aux_clk_pad_oe_o,
123
       ps2_aux_data_pad_oe_o ;
124
 
125
assign ps2_aux_clk_pad_o  = 1'b0 ;
126
assign ps2_aux_data_pad_o = 1'b0 ;
127
`endif
128
 
129
wire rx_released,
130
     rx_kbd_data_ready,
131 2 mihad
     rx_translated_data_ready,
132 13 mihad
     rx_kbd_read_wb,
133
     rx_kbd_read_tt,
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     tx_kbd_write,
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     tx_kbd_write_ack,
136 2 mihad
     tx_error_no_keyboard_ack,
137
     ps2_ctrl_kbd_data_en_,
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     ps2_ctrl_kbd_clk_en_,
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     ps2_ctrl_kbd_clk,
140
     inhibit_kbd_if ;
141
 
142 13 mihad
wire [7:0] rx_scan_code,
143 2 mihad
           rx_translated_scan_code,
144 13 mihad
           tx_kbd_data ;
145 2 mihad
 
146
assign ps2_kbd_clk_pad_o  = 1'b0 ;
147
assign ps2_kbd_data_pad_o = 1'b0 ;
148
 
149 13 mihad
ps2_io_ctrl i_ps2_io_ctrl_keyboard
150 2 mihad
(
151 13 mihad
    .clk_i               (wb_clk_i),
152
    .rst_i               (wb_rst_i),
153
    .ps2_ctrl_clk_en_i_  (ps2_ctrl_kbd_clk_en_),
154
    .ps2_ctrl_data_en_i_ (ps2_ctrl_kbd_data_en_),
155
    .ps2_clk_pad_i       (ps2_kbd_clk_pad_i),
156
    .ps2_clk_pad_oe_o    (ps2_kbd_clk_pad_oe_o),
157
    .ps2_data_pad_oe_o   (ps2_kbd_data_pad_oe_o),
158
    .inhibit_if_i        (inhibit_kbd_if),
159
    .ps2_ctrl_clk_o      (ps2_ctrl_kbd_clk)
160 2 mihad
);
161
 
162 13 mihad
`ifdef PS2_AUX
163
wire rx_aux_data_ready,
164
     rx_aux_read,
165
     tx_aux_write,
166
     tx_aux_write_ack,
167
     tx_error_no_aux_ack,
168
     ps2_ctrl_aux_data_en_,
169
     ps2_ctrl_aux_clk_en_,
170
     ps2_ctrl_aux_clk,
171
     inhibit_aux_if ;
172
 
173
wire [7:0] rx_aux_data,
174
           tx_aux_data ;
175
 
176
ps2_io_ctrl i_ps2_io_ctrl_auxiliary
177
(
178
    .clk_i               (wb_clk_i),
179
    .rst_i               (wb_rst_i),
180
    .ps2_ctrl_clk_en_i_  (ps2_ctrl_aux_clk_en_),
181
    .ps2_ctrl_data_en_i_ (ps2_ctrl_aux_data_en_),
182
    .ps2_clk_pad_i       (ps2_aux_clk_pad_i),
183
    .ps2_clk_pad_oe_o    (ps2_aux_clk_pad_oe_o),
184
    .ps2_data_pad_oe_o   (ps2_aux_data_pad_oe_o),
185
    .inhibit_if_i        (inhibit_aux_if),
186
    .ps2_ctrl_clk_o      (ps2_ctrl_aux_clk)
187
);
188
 
189
ps2_mouse #(`PS2_TIMER_60USEC_VALUE_PP, `PS2_TIMER_60USEC_BITS_PP, `PS2_TIMER_5USEC_VALUE_PP, `PS2_TIMER_5USEC_BITS_PP)
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i_ps2_mouse
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(
192
    .clk                         (wb_clk_i),
193
    .reset                       (wb_rst_i),
194
    .ps2_clk_en_o_               (ps2_ctrl_aux_clk_en_),
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    .ps2_data_en_o_              (ps2_ctrl_aux_data_en_),
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    .ps2_clk_i                   (ps2_ctrl_aux_clk),
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    .ps2_data_i                  (ps2_aux_data_pad_i),
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    .rx_scan_code                (rx_aux_data),
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    .rx_data_ready               (rx_aux_data_ready),
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    .rx_read                     (rx_aux_read),
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    .tx_data                     (tx_aux_data),
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    .tx_write                    (tx_aux_write),
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    .tx_write_ack_o              (tx_aux_write_ack),
204
    .tx_error_no_ack             (tx_error_no_aux_ack)
205
);
206
 
207
`endif
208
 
209
ps2_keyboard #(`PS2_TIMER_60USEC_VALUE_PP, `PS2_TIMER_60USEC_BITS_PP, `PS2_TIMER_5USEC_VALUE_PP, `PS2_TIMER_5USEC_BITS_PP)
210 2 mihad
i_ps2_keyboard
211
(
212
    .clk                         (wb_clk_i),
213
    .reset                       (wb_rst_i),
214
    .ps2_clk_en_o_               (ps2_ctrl_kbd_clk_en_),
215
    .ps2_data_en_o_              (ps2_ctrl_kbd_data_en_),
216
    .ps2_clk_i                   (ps2_ctrl_kbd_clk),
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    .ps2_data_i                  (ps2_kbd_data_pad_i),
218
    .rx_released                 (rx_released),
219
    .rx_scan_code                (rx_scan_code),
220 13 mihad
    .rx_data_ready               (rx_kbd_data_ready),
221
    .rx_read                     (rx_kbd_read_tt),
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    .tx_data                     (tx_kbd_data),
223
    .tx_write                    (tx_kbd_write),
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    .tx_write_ack_o              (tx_kbd_write_ack),
225 2 mihad
    .tx_error_no_keyboard_ack    (tx_error_no_keyboard_ack),
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    .translate                   (translate)
227
);
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229
ps2_wb_if i_ps2_wb_if
230
(
231
    .wb_clk_i                      (wb_clk_i),
232
    .wb_rst_i                      (wb_rst_i),
233
    .wb_cyc_i                      (wb_cyc_i),
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    .wb_stb_i                      (wb_stb_i),
235
    .wb_we_i                       (wb_we_i),
236
    .wb_sel_i                      (wb_sel_i),
237
    .wb_adr_i                      (wb_adr_i),
238
    .wb_dat_i                      (wb_dat_i),
239
    .wb_dat_o                      (wb_dat_o),
240
    .wb_ack_o                      (wb_ack_o),
241 13 mihad
 
242 2 mihad
    .wb_int_o                      (wb_int_o),
243 13 mihad
 
244 2 mihad
    .rx_scancode_i                 (rx_translated_scan_code),
245 13 mihad
    .rx_kbd_data_ready_i           (rx_translated_data_ready),
246
    .rx_kbd_read_o                 (rx_kbd_read_wb),
247
    .tx_kbd_data_o                 (tx_kbd_data),
248
    .tx_kbd_write_o                (tx_kbd_write),
249
    .tx_kbd_write_ack_i            (tx_kbd_write_ack),
250 2 mihad
    .translate_o                   (translate),
251 13 mihad
    .ps2_kbd_clk_i                 (ps2_kbd_clk_pad_i),
252 2 mihad
    .inhibit_kbd_if_o              (inhibit_kbd_if)
253 13 mihad
    `ifdef PS2_AUX
254
    ,
255
    .wb_intb_o                     (wb_intb_o),
256
 
257
    .rx_aux_data_i                 (rx_aux_data),
258
    .rx_aux_data_ready_i           (rx_aux_data_ready),
259
    .rx_aux_read_o                 (rx_aux_read),
260
    .tx_aux_data_o                 (tx_aux_data),
261
    .tx_aux_write_o                (tx_aux_write),
262
    .tx_aux_write_ack_i            (tx_aux_write_ack),
263
    .ps2_aux_clk_i                 (ps2_aux_clk_pad_i),
264
    .inhibit_aux_if_o              (inhibit_aux_if)
265
    `endif
266 2 mihad
) ;
267
 
268
ps2_translation_table i_ps2_translation_table
269
(
270
    .reset_i                    (wb_rst_i),
271
    .clock_i                    (wb_clk_i),
272
    .translate_i                (translate),
273
    .code_i                     (rx_scan_code),
274
    .code_o                     (rx_translated_scan_code),
275
    .address_i                  (8'h00),
276
    .data_i                     (8'h00),
277
    .we_i                       (1'b0),
278
    .re_i                       (1'b0),
279
    .data_o                     (),
280 13 mihad
    .rx_data_ready_i            (rx_kbd_data_ready),
281 2 mihad
    .rx_translated_data_ready_o (rx_translated_data_ready),
282 13 mihad
    .rx_read_i                  (rx_kbd_read_wb),
283
    .rx_read_o                  (rx_kbd_read_tt),
284
    .rx_released_i              (rx_released)
285 2 mihad
) ;
286
 
287
endmodule // ps2_top

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