Subversion Repositories ps2

#!/bin/csh -f

#//////////////////////////////////////////////////////////////////////

#////                                                              ////

#////  run_ps2_sim.scr                                             ////

#////                                                              ////

#////  This file is part of the "ps2" project                      ////

#////  http://www.opencores.org/cores/ps2/                         ////

#////                                                              ////

#////  Author(s):                                                  ////

#////      - mihad@opencores.org                                   ////

#////      - Miha Dolenc                                           ////

#////                                                              ////

#////  All additional information is avaliable in the README.txt   ////

#////  file.                                                       ////

#////                                                              ////

#////                                                              ////

#//////////////////////////////////////////////////////////////////////

#////                                                              ////

#//// Copyright (C) 2000 Miha Dolenc, mihad@opencores.org          ////

#////                                                              ////

#//// This source file may be used and distributed without         ////

#//// restriction provided that this copyright statement is not    ////

#//// removed from the file and that any derivative work contains  ////

#//// the original copyright notice and the associated disclaimer. ////

#////                                                              ////

#//// This source file is free software; you can redistribute it   ////

#//// and/or modify it under the terms of the GNU Lesser General   ////

#//// Public License as published by the Free Software Foundation; ////

#//// either version 2.1 of the License, or (at your option) any   ////

#//// later version.                                               ////

#////                                                              ////

#//// This source is distributed in the hope that it will be       ////

#//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////

#//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////

#//// PURPOSE.  See the GNU Lesser General Public License for more ////

#//// details.                                                     ////

#////                                                              ////

#//// You should have received a copy of the GNU Lesser General    ////

#//// Public License along with this source; if not, download it   ////

#//// from http://www.opencores.org/lgpl.shtml                     ////

#////                                                              ////

#//////////////////////////////////////////////////////////////////////

#//

#// CVS Revision History

#//

#// $Log: not supported by cvs2svn $

#// Revision 1.2  2002/02/20 15:20:11  mihad

#// Little/big endian changes incorporated

#//

#// Revision 1.1.1.1  2002/02/18 16:16:55  mihad

#// Initial project import - working

#//

#//

echo "-MESSAGES" > ./ncvlog.args

echo "-NOCOPYRIGHT" >> ./ncvlog.args

echo "-CDSLIB ../bin/cds.lib" >> ./ncvlog.args

echo "-HDLVAR ../bin/hdl.var" >> ./ncvlog.args

echo "-INCDIR ../../../bench/verilog" >> ./ncvlog.args

echo "-INCDIR ../../../rtl/verilog" >> ./ncvlog.args

echo '-DEFINE "PS2_NUM_OF_NORMAL_SCANCODES 85"' >> ./ncvlog.args

echo '-DEFINE "PS2_NUM_OF_EXTENDED_SCANCODES 38"' >> ./ncvlog.args

echo '-DEFINE "SIM"' >> ./ncvlog.args

set current_par = 0

set output_waveform = 0

set xilinx = 0

while ( $current_par < $# )

    @ current_par = $current_par + 1

    switch ( $argv[$current_par] )

    case xilinx:

        echo '-DEFINE "XILINX"' >> ./ncvlog.args

        @ xilinx = 1

        breaksw

    case wave:

        @ output_waveform = 1

        breaksw

    default:

        echo 'Unknown option "'$argv[$current_par]'"!'

        exit

        breaksw

    endsw

end

echo "-LOGFILE ../log/ncvlog.log" >> ./ncvlog.args

foreach filename ( `cat ../bin/rtl_file_list` )

    echo "../../../rtl/verilog/"$filename >> ./ncvlog.args

end

foreach filename ( `cat ../bin/sim_file_list` )

    echo "../../../bench/verilog/"$filename >> ./ncvlog.args

end

if ( $xilinx ) then

    foreach filename ( `cat ../bin/xilinx_file_list` )

        echo "../../../../xilinx_blocks/"$filename >> ./ncvlog.args

    end

endif

ncvlog -f ./ncvlog.args

echo "-MESSAGES" > ./ncelab.args

echo "-NOCOPYRIGHT" >> ./ncelab.args

echo "-CDSLIB ../bin/cds.lib" >> ./ncelab.args

echo "-HDLVAR ../bin/hdl.var" >> ./ncelab.args

echo "-LOGFILE ../log/ncelab.log" >> ./ncelab.args

echo "-SNAPSHOT worklib.ps2_test_bench:rtl" >> ./ncelab.args

echo "-ACCESS +RWC" >> ./ncelab.args

echo "worklib.ps2_test_bench" >> ./ncelab.args

if ( $xilinx ) then

    echo "worklib.glbl" >> ./ncelab.args

endif

ncelab -f ./ncelab.args

echo "-MESSAGES" > ./ncsim.args

echo "-NOCOPYRIGHT" >> ./ncsim.args

echo "-CDSLIB ../bin/cds.lib"  >> ./ncsim.args

echo "-HDLVAR ../bin/hdl.var"  >> ./ncsim.args

echo "-INPUT ./ncsim.tcl" >> ./ncsim.args

echo "-LOGFILE ../log/ncsim.log" >> ./ncsim.args

echo "worklib.ps2_test_bench:rtl" >> ./ncsim.args

if ( $output_waveform ) then

    echo "database -open waves -shm -into ../out/waves.shm" > ./ncsim.tcl

    echo "probe -create -database waves ps2_test_bench -shm -all -depth all" >> ./ncsim.tcl

    echo "run"  >> ./ncsim.tcl

else

    echo "run"  > ./ncsim.tcl

endif

echo "quit" >> ./ncsim.tcl

ncsim -f ./ncsim.args