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panda_emc |
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--
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-- Copyright (C) 2011 Peter Lemmens, PANDA collaboration
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-- p.j.j.lemmens@rug.nl
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-- http://www-panda.gsi.de
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--
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-- As a reference, please use:
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-- E. Guliyev, M. Kavatsyuk, P.J.J. Lemmens, G. Tambave, H. Loehner,
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-- "VHDL Implementation of Feature-Extraction Algorithm for the PANDA Electromagnetic Calorimeter"
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-- Nuclear Inst. and Methods in Physics Research, A ....
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--
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU Lesser General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU Lesser General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111 USA
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--
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-----------------------------------------------------------------------------------------------
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-----------------------------------------------------------------------------------------------
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-- Company : KVI (Kernfysisch Versneller Instituut -- Groningen, The Netherlands
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-- Author : P.J.J. Lemmens
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-- Design Name : Feature Extraction
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-- Module Name : peak_detect.vhd
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-- Description : peak-detector keeps track of <DEPTH> samples. When a trigger occurs
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-- the max value of these samples is determined and sent to max_out
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-- accompanied by a max_valid signal. This process runs on the sample clock
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-- and the <DEPTH> determines it's latency
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--
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-----------------------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_SIGNED.ALL;
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entity history_max is
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generic( MEM_PWR : natural := 1; -- memory size = 2^MEM_PWR
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DEPTH : natural := 1 -- implemented buffer depth; should be < 2^MEM_PWR
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);
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Port ( rst : in STD_LOGIC;
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clk : in STD_LOGIC;
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enable : in STD_LOGIC := '1';
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trigger : in STD_LOGIC;
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data_in : in STD_LOGIC_VECTOR;
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max_valid : out STD_LOGIC;
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max_out : out STD_LOGIC_VECTOR
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);
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end history_max;
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architecture Behavioral of history_max is
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constant WIDTH : natural := data_in'length;
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component pipeline
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generic( RAM_SIZE_PWR : natural;
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DELAY : natural);
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port ( rst : IN STD_LOGIC ;
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clk : IN STD_LOGIC ;
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enable : IN STD_LOGIC := '1';
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data_in : IN STD_LOGIC_VECTOR;
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data_valid : out std_logic;
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data_out : OUT STD_LOGIC_VECTOR
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);
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end component;
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signal rst_S : std_logic := '1';
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signal clk_S : std_logic;
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signal enable_S : std_logic := '1';
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signal trigger_S : std_logic := '1';
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signal data_in_S : std_logic_vector(WIDTH - 1 downto 0) := (others => '0');
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signal del_data_S : std_logic_vector(WIDTH - 1 downto 0) := (others => '0');
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signal max_valid_S : std_logic := '0';
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signal max_out_S : std_logic_vector(WIDTH - 1 downto 0) := (others => '0');
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signal pipecount_S : std_logic_vector(MEM_PWR downto 0) := (others => '0');
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begin
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history_pipe : pipeline
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generic map(RAM_SIZE_PWR => MEM_PWR,
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DELAY => DEPTH - 1) -- hier doen want ik voeg in deze file ook nog een stap toe !!
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PORT MAP ( rst => rst_S,
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clk => clk_S,
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enable => enable_S, -- this pipe is allways running !!
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data_in => data_in_S,
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data_out => del_data_S
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);
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clk_S <= clk; -- connect clk PORT to internal clk-signal
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rst_S <= rst;
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enable_S <= enable;
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trigger_S <= trigger;
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data_in_S <= data_in;
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max_valid <= max_valid_S;
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max_out <= max_out_S;
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get_max : process (clk_S, rst_S, data_in_S, trigger_S)
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begin
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if (clk_S'event and clk_S = '1') then
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if (rst_S = '1') then
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max_valid_S <= '0';
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pipecount_S <= (others => '0');
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else
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if (enable_S = '1') then
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if (trigger_S = '1') then
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pipecount_S <= conv_std_logic_vector(DEPTH - 1, MEM_PWR + 1);
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max_out_S <= del_data_S;
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else
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if (pipecount_S > 0) then
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pipecount_S <= pipecount_S - 1;
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if (del_data_S > max_out_S) then
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max_out_S <= del_data_S; -- this is one extra delay
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end if;
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end if;
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end if;
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if (pipecount_S = 1) then
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max_valid_S <= '1';
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else
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max_valid_S <= '0';
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end if;
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end if;
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end if;
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end if;
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end process;
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end Behavioral;
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