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panda_emc |
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--
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-- Copyright (C) 2011 Peter Lemmens, PANDA collaboration
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-- p.j.j.lemmens@rug.nl
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-- http://www-panda.gsi.de
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--
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-- As a reference, please use:
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-- E. Guliyev, M. Kavatsyuk, P.J.J. Lemmens, G. Tambave, H. Loehner,
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-- "VHDL Implementation of Feature-Extraction Algorithm for the PANDA Electromagnetic Calorimeter"
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-- Nuclear Inst. and Methods in Physics Research, A ....
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--
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU Lesser General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU Lesser General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111 USA
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--
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-----------------------------------------------------------------------------------------------
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-----------------------------------------------------------------------------------------------
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-- Company : KVI (Kernfysisch Versneller Instituut -- Groningen, The Netherlands
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-- Author : P.J.J. Lemmens
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-- Design Name : Feature Extraction
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-- Module Name : window_diff.vhd
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-- Description : Somewhat obsolete module; Originally used to calculate the difference
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-- between two samples at a fixed interval. That is still what it does,
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-- only: the interval = 1 (where it used to be set by Generics)
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-- Data delays were introduced to overcome event-detection latency
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--
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-----------------------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_SIGNED.ALL;
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entity window_diff is
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Port ( rst : in STD_LOGIC;
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clk : in STD_LOGIC;
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enable : in STD_LOGIC;
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trigger : in STD_LOGIC;
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data_in : in STD_LOGIC_VECTOR;
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base_out : out STD_LOGIC_VECTOR;
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diff_out : out STD_LOGIC_VECTOR
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);
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end window_diff;
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architecture Behavioral of window_diff is
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constant WIDTH : natural := data_in'length;
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signal rst_S : std_logic := '1';
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signal clk_S : std_logic := '0';
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signal enable_S : std_logic := '0';
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signal trigger_S : std_logic := '0';
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signal data_in_S : std_logic_vector (WIDTH - 1 downto 0) := (others => '0');
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signal del1_data_S : std_logic_vector (WIDTH - 1 downto 0) := (others => '0');
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signal del2_data_S : std_logic_vector (WIDTH - 1 downto 0) := (others => '0');
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signal del3_data_S : std_logic_vector (WIDTH - 1 downto 0) := (others => '0');
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signal del4_data_S : std_logic_vector (WIDTH - 1 downto 0) := (others => '0');
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signal del5_data_S : std_logic_vector (WIDTH - 1 downto 0) := (others => '0');
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signal base_data_S : std_logic_vector (WIDTH - 1 downto 0) := (others => '0');
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signal diff_out_S : std_logic_vector (WIDTH - 1 downto 0) := (others => '0');
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signal base_val_S : std_logic_vector (WIDTH - 1 downto 0) := (others => '0');
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--------------------------------------------------------------------------------------------------
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begin
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trigger_delay_proc : process(rst_S, clk_S, enable_S, data_in_S)
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begin
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if (clk_S'event and clk_S = '1') then
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if (rst_S = '1') then
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del1_data_S <= (others => '0');
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del2_data_S <= (others => '0');
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del3_data_S <= (others => '0');
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del4_data_S <= (others => '0');
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else
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if (enable_S = '1') then
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del1_data_S <= data_in_S;
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del2_data_S <= del1_data_S;
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del3_data_S <= del2_data_S;
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del4_data_S <= del3_data_S;
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end if;
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end if;
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end if;
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end process;
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zerox_win_proc : process(rst_S, clk_S, enable_S, del4_data_S)
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begin
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if (clk_S'event and clk_S = '1') then
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if (rst_S = '1') then
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del5_data_S <= (others => '0');
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else
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if (enable_S = '1') then
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del5_data_S <= del4_data_S;
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base_data_S <= del5_data_S;
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end if;
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end if;
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end if;
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end process;
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rst_S <= rst;
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clk_S <= clk;
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enable_S <= enable;
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trigger_S <= trigger;
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data_in_S <= data_in;
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base_out <= base_val_S;
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diff_out <= diff_out_S;
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pipe_proc : process(rst_S, clk_S, enable_S, trigger_S, del5_data_S, base_data_S)
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begin
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if (clk_S'event and clk_S = '1') then
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if (rst_S = '1') then
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diff_out_S <= (others => '0');
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base_val_S <= (others => '0');
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else
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if (enable_S = '1') then
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if (trigger_S = '1') then -- below was: "del3_data_S - base_data_S".... don't know why
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diff_out_S <= conv_std_logic_vector(conv_integer(signed(del5_data_S)) - conv_integer(signed(base_data_S)), WIDTH);
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base_val_S <= base_data_S;
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end if;
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end if;
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end if;
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end if;
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end process;
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end Behavioral;
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