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[/] [qaz_libs/] [trunk/] [BFM/] [src/] [tb/] [tb_base.sv] - Blame information for rev 48

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1 34 qaztronic
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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`timescale 1ps/1ps
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import tb_clk_pkg::*;
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module
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  tb_base
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  #(
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    parameter PERIOD = 0,
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    parameter ASSERT_TIME = 0
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  )
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  (
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    output      clock,
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    output reg  reset
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  );
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  // --------------------------------------------------------------------
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  //
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  task assert_reset
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  (
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    input time reset_assert
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  );
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    reset = 1;
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    $display( "-#- %16.t | %m | reset asserted!", $time );
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    #reset_assert;
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    reset = 0;
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    $display( "-#- %16.t | %m | reset deasserted!", $time );
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endtask
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  // --------------------------------------------------------------------
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  //
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  task timeout_stop
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  (
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    input time timeout
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  );
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    $display("-#- %16.t | %m | timeout_stop at %t", $time, timeout);
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    fork
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      #(timeout) $stop;
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    join_none
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endtask
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  // --------------------------------------------------------------------
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  //
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  tb_clk_class tb_clk_c;
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  tb_clk_if tb_clk_driver();
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  assign clock = tb_clk_driver.clk;
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  time reset_assert = (PERIOD * 5) + (PERIOD / 3);
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  logic init_done = 0;
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  initial
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    begin
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      reset = 1;
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      tb_clk_c = new( tb_clk_driver );
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      if( PERIOD != 0 )
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        tb_clk_c.init_basic_clock( PERIOD );
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      if( ASSERT_TIME != 0 )
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        assert_reset( ASSERT_TIME );
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      else if( reset_assert != 0 )
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        assert_reset( reset_assert );
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      init_done = 1;
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    end
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endmodule
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