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[/] [qaz_libs/] [trunk/] [PCIe/] [src/] [PCIe_debug_if.sv] - Blame information for rev 40
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qaztronic |
//////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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interface
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PCIe_debug_if
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(
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input reset,
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input clk
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);
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logic [2:0] tlp_fmt;
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logic [4:0] tlp_type;
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logic [2:0] tlp_tc;
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logic tlp_th;
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logic tlp_td;
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logic tlp_ep;
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logic [2:0] tlp_attr;
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logic tlp_at;
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logic [9:0] tlp_length;
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logic [1:0] tlp_ph;
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logic enable_r;
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logic [31:0] h0_r;
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logic [31:0] h1_r;
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logic [31:0] h2_r;
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logic [31:0] h3_r;
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logic tlp_is_3dw;
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logic tlp_is_4dw;
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logic [63:0] tlp_address;
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// --------------------------------------------------------------------
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//
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endinterface
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