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// (C) 2001-2016 Intel Corporation. All rights reserved.
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// Your use of Intel Corporation's design tools, logic functions and other
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// software and tools, and its AMPP partner logic functions, and any output
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// files any of the foregoing (including device programming or simulation
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// files), and any associated documentation or information are expressly subject
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// to the terms and conditions of the Intel Program License Subscription
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// Agreement, Intel MegaCore Function License Agreement, or other applicable
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// license agreement, including, without limitation, that your use is for the
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// sole purpose of programming logic devices manufactured by Intel and sold by
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// Intel or its authorized distributors. Please refer to the applicable
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// agreement for further details.
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// $Id: //acds/rel/16.1/ip/sopc/components/verification/lib/avalon_mm_pkg.sv#1 $
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// $Revision: #1 $
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// $Date: 2016/08/07 $
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//-----------------------------------------------------------------------------
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// =head1 NAME
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// avalon_mm_pkg
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// =head1 SYNOPSIS
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// Package for shared Avalon MM component types.
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//-----------------------------------------------------------------------------
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// =head1 COPYRIGHT
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// Copyright (c) 2008 Altera Corporation. All Rights Reserved.
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// The information contained in this file is the property of Altera
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// Corporation. Except as specifically authorized in writing by Altera
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// Corporation, the holder of this file shall keep all information
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// contained herein confidential and shall protect same in whole or in part
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// from disclosure and dissemination to all third parties. Use of this
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// program confirms your agreement with the terms of this license.
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//-----------------------------------------------------------------------------
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// =head1 DESCRIPTION
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// This package contains shared non-parameterized type definitions.
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// =cut
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`timescale 1ns / 1ns
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`ifndef _AVALON_MM_PKG_
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`define _AVALON_MM_PKG_
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package avalon_mm_pkg;
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import verbosity_pkg::*;
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// Transaction request types
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typedef enum int { // public
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REQ_READ = 0, // Read Request
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REQ_WRITE = 1, // Write Request
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REQ_IDLE = 2 // Idle
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} Request_t;
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// Slave BFM wait state logic operates in one of three distinct modes
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typedef enum int {
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WAIT_FIXED = 0, // default: fixed wait cycles per burst cycle
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WAIT_RANDOM = 1, // random min =< wait cycles <= max
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WAIT_ADDRESSABLE = 2 // fixed wait cycles per command address
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} SlaveWaitMode_t;
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// Avalon MM transaction response status
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typedef enum logic[1:0] {
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AV_OKAY = 0,
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AV_RESERVED = 1,
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AV_SLAVE_ERROR = 2,
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AV_DECODE_ERROR = 3
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} AvalonResponseStatus_t;
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function automatic string request_string(Request_t request);
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case(request)
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REQ_READ: return("read");
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REQ_WRITE: return("write");
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REQ_IDLE: return("idle");
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default: return("INVALID_REQUEST");
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endcase
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endfunction
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endpackage
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`endif
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