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qaztronic |
//////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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`timescale 1 ps / 1 ps
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module
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ast_monitor
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#(
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ST_SYMBOL_W,
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ST_NUMSYMBOLS,
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USE_PACKET,
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ST_READY_LATENCY,
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USE_CHANNEL = 0,
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USE_ERROR = 0,
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USE_READY = 1,
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USE_VALID = 1,
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USE_EMPTY = 1,
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ST_ERROR_W = 1,
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ST_MAX_PACKET_SIZE = 1,
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ST_MAX_CHANNELS = 0,
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ST_CHANNEL_W = $clog2(ST_MAX_CHANNELS),
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ST_EMPTY_W = (ST_NUMSYMBOLS == 1) ? 1 : $clog2(ST_NUMSYMBOLS)
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)
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(
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ast_if src,
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ast_if sink,
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input clk,
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input reset
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);
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altera_avalon_st_monitor
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#(
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.USE_PACKET (USE_PACKET),
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.USE_CHANNEL (USE_CHANNEL),
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.USE_ERROR (USE_ERROR),
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.USE_READY (USE_READY),
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.USE_VALID (USE_VALID),
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.USE_EMPTY (USE_EMPTY),
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.ST_SYMBOL_W (ST_SYMBOL_W),
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.ST_NUMSYMBOLS (ST_NUMSYMBOLS),
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.ST_CHANNEL_W (ST_CHANNEL_W),
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.ST_ERROR_W (ST_ERROR_W),
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.ST_EMPTY_W (ST_EMPTY_W),
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.ST_READY_LATENCY (ST_READY_LATENCY),
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.ST_BEATSPERCYCLE (1),
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.ST_MAX_CHANNELS (ST_MAX_CHANNELS),
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.ST_MAX_PACKET_SIZE (ST_MAX_PACKET_SIZE),
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.VHDL_ID (0)
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)
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altera_avalon_st_monitor_i
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(
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.clk (clk), // clk.clk
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.reset (reset), // clk_reset.reset
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.src_data (src.data), // src.data
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.src_valid (src.valid), // .valid
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.src_ready (src.ready), // .ready
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.src_startofpacket (src.startofpacket), // .startofpacket
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.src_endofpacket (src.endofpacket), // .endofpacket
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.src_empty (src.empty), // .empty
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.src_channel (src.channel), // .channel
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.src_error (src.error), // .error
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.sink_data (sink.data), // sink.data
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.sink_valid (sink.valid), // .valid
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.sink_ready (sink.ready), // .ready
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.sink_startofpacket (sink.startofpacket), // .startofpacket
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.sink_endofpacket (sink.endofpacket), // .endofpacket
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.sink_empty (sink.empty), // .empty
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.sink_channel (sink.channel), // .channel
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.sink_error (sink.error) // .error
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);
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// --------------------------------------------------------------------
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//
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endmodule
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