OpenCores
URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

[/] [qaz_libs/] [trunk/] [axi4_stream_lib/] [src/] [recursive_axis_switch.sv] - Blame information for rev 46

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 36 qaztronic
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
//// Copyright (C) 2017 Authors and OPENCORES.ORG                 ////
4
////                                                              ////
5
//// This source file may be used and distributed without         ////
6
//// restriction provided that this copyright statement is not    ////
7
//// removed from the file and that any derivative work contains  ////
8
//// the original copyright notice and the associated disclaimer. ////
9
////                                                              ////
10
//// This source file is free software; you can redistribute it   ////
11
//// and/or modify it under the terms of the GNU Lesser General   ////
12
//// Public License as published by the Free Software Foundation; ////
13
//// either version 2.1 of the License, or (at your option) any   ////
14
//// later version.                                               ////
15
////                                                              ////
16
//// This source is distributed in the hope that it will be       ////
17
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
18
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
19
//// PURPOSE.  See the GNU Lesser General Public License for more ////
20
//// details.                                                     ////
21
////                                                              ////
22
//// You should have received a copy of the GNU Lesser General    ////
23
//// Public License along with this source; if not, download it   ////
24
//// from http://www.opencores.org/lgpl.shtml                     ////
25
////                                                              ////
26
//////////////////////////////////////////////////////////////////////
27
 
28
 
29
module
30
  recursive_axis_switch
31
  #(
32
    N, // data bus width in bytes
33
    I = 1, // TID width
34
    D = 1, // TDEST width
35
    U = 1, // TUSER width
36
    SA, // mux select width
37
    SD = 2 ** SA
38
  )
39
  (
40
    input   [SA-1:0] select,
41
    axis_if axis_in,
42
    axis_if axis_out[SD-1:0],
43
    input   aclk,
44
    input   aresetn
45
  );
46
 
47
  // --------------------------------------------------------------------
48
  //
49
  generate
50
    if(SA == 1)
51
    begin: switch_gen
52
      axis_switch #(.N(N), .I(I), .D(D), .U(U))
53
        axis_switch_i(.*);
54
    end
55
    else
56
    begin: recursive_switch_gen
57
 
58
      // --------------------------------------------------------------------
59
      //
60
      axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_switch_out[1:0](.*);
61
 
62
      axis_switch #(.N(N), .I(I), .D(D), .U(U))
63
        axis_switch_i
64
        (
65
          .select(select[SA-1]),
66
          .axis_out(axis_switch_out),
67
          .*
68
        );
69
 
70
 
71
      // --------------------------------------------------------------------
72
      //
73
      recursive_axis_switch #(.N(N), .I(I), .D(D), .U(U), .SA(SA - 1))
74
        switch_lo
75
        (
76
          .select(select[SA-2:0]),
77
          .axis_in(axis_switch_out[0]),
78
          .axis_out(axis_out[(SD/2)-1:0]),
79
          .*
80
        );
81
 
82
 
83
      // --------------------------------------------------------------------
84
      //
85
      recursive_axis_switch #(.N(N), .I(I), .D(D), .U(U), .SA(SA - 1))
86
        switch_hi
87
        (
88
          .select(select[SA-2:0]),
89
          .axis_in(axis_switch_out[1]),
90
          .axis_out(axis_out[SD-1:(SD/2)]),
91
          .*
92
        );
93
    end
94
  endgenerate
95
 
96
 
97
// --------------------------------------------------------------------
98
//
99
endmodule
100
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.