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[/] [qaz_libs/] [trunk/] [basal/] [sim/] [tests/] [tb_pcie_scrambler/] [pcie_scrambler_testbench.v] - Blame information for rev 47

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Line No. Rev Author Line
1 34 qaztronic
// --------------------------------------------------------------------
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//
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// --------------------------------------------------------------------
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`timescale 10ps/1ps
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module
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  pcie_scrambler_testbench ();
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// --------------------------------------------------------------------
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  reg clock = 0;
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  always
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    #(20) clock <= ~clock;
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// --------------------------------------------------------------------
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  reg reset = 1;
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  initial
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    begin
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      reset <= 1'b1;
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      repeat(3)
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        @(posedge clock);
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      reset <= 1'b0;
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    end
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// --------------------------------------------------------------------
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  wire [7:0] data_out;
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  pcie_scrambler i_pcie_scrambler
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  (
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    .data_in( 0 ),
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    .scram_en( 1'b1 ),
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    .scram_rst( reset ),
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    .data_out(data_out),
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    .rst( reset ),
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    .clk( clock )
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  );
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// --------------------------------------------------------------------
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integer i = 0;
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integer fh;
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  initial
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    begin
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      fh = $fopen( "pcie_scrambler_0_in.csv" );
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      $fdisplay( fh, "count, data_out" );
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    end
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  always @( posedge clock )
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    begin
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      if( ~reset )
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        begin
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          $display( "-#- %16.t | 0x%2x", $time, data_out );
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          $fdisplay( fh, "%d,`%2x", i, data_out );
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          i = i + 1;
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        end
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    end
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endmodule
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