OpenCores
URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

[/] [qaz_libs/] [trunk/] [basal/] [src/] [8b10b/] [validate_8b10b.v] - Blame information for rev 50

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 34 qaztronic
// Chuck Benz, Hollis, NH   Copyright (c)2002
2
//
3
// The information and description contained herein is the
4
// property of Chuck Benz.
5
//
6
// Permission is granted for any reuse of this information
7
// and description as long as this copyright notice is
8
// preserved.  Modifications may be made as long as this
9
// notice is preserved.
10
 
11
// 11-OCT-2002: updated with clearer messages, and checking decodeout
12
 
13
`timescale 1ns / 1ns
14
module test_8b10b ;
15
   reg [29:0]    code8b10b [0:267] ;
16
   reg [8:0]     testin ;
17
   reg          dispin ;
18
   reg [10:0]    i ;
19
   wire [9:0]    testout ;
20
   wire         dispout, decodedisp, decodeerr, disperr ;
21
   wire [8:0]    decodeout ;
22
   // My data file is 30 columns. Column 1 becomes [29], 2 becomes [28], etc..
23
   // code[0] is last Column (30)
24
   // First column, [29] is K indication
25
   // columns 2:9, [28:21], are data byte, aka 'm' and 'n' of Dm.n
26
   // columns 10:19, [20:11] are 10b symbol if starting disparity was negative, 0
27
   // columns 20:29, [10:1] are 10b symbol if starting disparity was positive, 1
28
   // column 30, [0], is a 1 if symbol results in a disparity flip
29
   //   0 for a balanced symbol (5 '1's, 5 '0's).
30
 
31
   wire [29:0]   code = code8b10b[i] ;
32
   wire [9:0]    expect_0_disp = {code[11], code[12], code[13], code[14], code[15],
33
                                 code[16], code[17], code[18], code[19], code[20]} ;
34
   wire [9:0]    expect_1_disp = {code[1], code[2], code[3], code[4], code[5],
35
                                 code[6], code[7], code[8], code[9], code[10]} ;
36
 
37
   reg [1023:0] legal ;  // mark every used 10b symbol as legal, leave rest marked as not
38
   reg [2047:0] okdisp ; // now mark every used combination of symbol and starting disparity
39
   reg [8:0]     mapcode [1023:0] ;
40
   reg [10:0]    codedisp0, codedisp1 ;
41
   reg [9:0]     decodein ;
42
   reg          decdispin ;
43
   integer      errors ;
44
 
45
   encode DUTE (testin, dispin, testout, dispout) ;
46
   decode DUTD (decodein, decdispin, decodeout, decodedisp, decodeerr, disperr) ;
47
 
48
   always @ (code) testin = code[29:21] ;
49
 
50
   initial begin
51
      errors = 0 ;
52
      $readmemb ("8b10b_a.mem", code8b10b) ;
53
      //$vcdpluson ;
54
      $dumpvars (0);
55
      $display ("\n\nFirst, test by trying all 268 (256 Dx.y and 12 Kx.y)") ;
56
      $display ("valid inputs, with both + and - starting disparity.");
57
      $display ("We check that the encoder output and ending disparity is correct.");
58
      $display ("We also check that the decoder matches.");
59
      for (i = 0 ; i < 268 ; i = i + 1) begin
60
         // testin = code[29:21] ;
61
         dispin = 0 ;
62
         #1
63
           decodein = testout ;
64
         decdispin = dispin ;
65
         #1
66
//         $display ("%b %b %b %b *%b*", dispin, testin, testout, {dispout, DUTD.disp6a, DUTD.disp6a2, DUTD.disp6a0, DUTD.disp6a2}, decodeout,, decodedisp,, DUTD.k28,, DUTD.disp6b) ;
67
         if (testout != expect_0_disp)
68
           $display ("bad code0 %b %b %b %b %b", dispin, testin,  dispout, testout, expect_0_disp) ;
69
         if (dispout != (dispin ^ code[0]))
70
           $display ("bad disp0 %b %b %b %b %b", dispin, testin, dispout, testout, (dispin ^ code[0])) ;
71
         if (0 != (9'b1_1111_1111 & (testin ^ decodeout)))
72
           $display ("diff in abcdefghk decode, %b %b %b %b %b", dispin, testin,  dispout, testout, decodeout) ;
73
         if (decodedisp != dispout)
74
           $display ("diff in decoder disp out, %b %b %b %b %b", dispin, testin,  dispout, testout, decodeout) ;
75
         if (decodeerr) $display ("decode error asserted improperly, %b %b %b %b %b", dispin, testin,  dispout, testout, decodeout) ;
76
         if ((testout != expect_0_disp) | decodeerr |
77
             (dispout != (dispin ^ code[0])) | (decodedisp != dispout))
78
           errors = errors + 1 ;
79
 
80
         dispin = 1 ;
81
         #1
82
         decodein = testout ;
83
         decdispin = dispin ;
84
         #1
85
//         $display ("%b %b %b %b *%b*", dispin, testin, testout, {dispout, DUTD.disp6a, DUTD.disp6a2, DUTD.disp6a0, DUTD.disp6a2, DUTD.fghjp31, DUTD.feqg, DUTD.heqj, DUTD.fghj22, DUTD.fi, DUTD.gi, DUTD.hi, DUTD.ji, DUTD.dispout}, decodeout,, decodedisp,, DUTD.k28,, DUTD.disp6b) ;
86
         if (testout != expect_1_disp)
87
           $display ("bad code1 %b %b %b %b %b", dispin, testin, dispout, testout, expect_1_disp) ;
88
         if (dispout != (dispin ^ code[0]))
89
           $display ("bad disp1 %b %b %b %b %b", dispin, testin,  dispout, testout, (dispin ^ code[0])) ;
90
         if (0 != (9'b1_1111_1111 & (testin ^ decodeout)))
91
           $display ("diff in abcdefghk decode, %b %b %b %b %b", dispin, testin,  dispout, testout, decodeout) ;
92
         if (decodedisp != dispout)
93
           $display ("diff in decoder disp out, %b %b %b %b %b", dispin, testin,  dispout, testout, decodeout) ;
94
         if (decodeerr) $display ("decode error asserted improperly, %b %b %b %b %b", dispin, testin,  dispout, testout, decodeout) ;
95
         if ((testout != expect_1_disp) | decodeerr |
96
             (dispout != (dispin ^ code[0])) | (decodedisp != dispout))
97
           errors = errors + 1 ;
98
      end
99
      $display ("%d errors in that testing.\n", errors) ;
100
 
101
      // Now, having verified all legal codes, lets run some illegal codes
102
      // at the decoder... how to figure illegal codes ?  2048 possible cases,
103
      // lets mark the OK ones...
104
      legal = 0 ;
105
      okdisp = 0 ;
106
      for (i = 0 ; i < 268 ; i = i + 1) begin
107
         #1
108
//         $display ("i=%d: %b %b %d %d %x %x", i, expect_0_disp, expect_1_disp, expect_0_disp, expect_1_disp, expect_0_disp, expect_1_disp) ;
109
         legal[expect_0_disp] = 1 ;
110
         legal[expect_1_disp] = 1 ;
111
         codedisp0 = expect_0_disp ;
112
         codedisp1 = {1'b1, expect_1_disp} ;
113
         okdisp[codedisp0] = 1 ;
114
         okdisp[codedisp1] = 1 ;
115
         mapcode[expect_0_disp] = code[29:21] ;
116
         mapcode[expect_1_disp] = code[29:21] ;
117
      end
118
 
119
      $display ("Now lets test all (legal and illegal) codes into the decoder.");
120
      $display ("checking all possible decode inputs") ;
121
      for (i = 0 ; i < 1024 ; i = i + 1) begin
122
         decodein = i ;
123
         decdispin = 0 ;
124
         codedisp1 = 1024 | i ;
125
         #1
126
         if (((legal[i] == 0) & (decodeerr != 1)) |
127
             (legal[i] & (mapcode[i] != decodeout)) |
128
             (legal[i] & (disperr != !okdisp[i])))
129
           $display ("10b:%b start disp:%b 8b:%b end disp:%b codevio:%b dispvio:%b known code:%b used disp:",
130
                     decodein, decdispin, decodeout, decodedisp, decodeerr, disperr, legal[i], okdisp[i]) ;
131
         if ((legal[i] == 0) & (decodeerr != 1)) $display ("ERR: decoderr should be 1") ;
132
         if (legal[i] & (mapcode[i] != decodeout)) $display ("ERR: decode output incorrect") ;
133
         if (legal[i] & (disperr != 1) & !okdisp[i]) $display ("ERR: disp err should be asserted") ;
134
         else if (legal[i] & (disperr != 0) & okdisp[i])
135
           $display ("ERR: disp err should not be asserted") ;
136
 
137
         if (((legal[i] == 0) & (decodeerr != 1)) |
138
             (legal[i] & !disperr & !okdisp[i]) |
139
             (legal[i] & (mapcode[i] != decodeout)) |
140
             (legal[i] & disperr & okdisp[i]))
141
           errors = errors + 1 ;
142
 
143
         decdispin = 1 ;
144
         #1
145
         if (((legal[i] == 0) & (decodeerr != 1)) |
146
             (legal[i] & (mapcode[i] != decodeout)) |
147
             (legal[i] & (disperr != !okdisp[i|1024])))
148
           $display ("10b:%b start disp:%b 8b:%b end disp:%b codevio:%b dispvio:%b known code:%b used disp:",
149
                     decodein, decdispin, decodeout, decodedisp, decodeerr, disperr, legal[i], okdisp[i|1024]) ;
150
         if ((legal[i] == 0) & (decodeerr != 1)) $display ("ERR: decoderr should be 1") ;
151
         if (legal[i] & (mapcode[i] != decodeout)) $display ("ERR: decode output incorrect") ;
152
         if (legal[i] & (disperr != 1) & !okdisp[i|1024]) $display ("ERR: disp err should be asserted") ;
153
         else if (legal[i] & (disperr != 0) & okdisp[i|1024])
154
           $display ("ERR: disp err should not be asserted") ;
155
         if (((legal[i] == 0) & (decodeerr != 1)) |
156
             (legal[i] & !disperr & !okdisp[i|1024]) |
157
             (legal[i] & (mapcode[i] != decodeout)) |
158
             (legal[i] & disperr & okdisp[i|1024]))
159
           errors = errors + 1 ;
160
      end // for (i = 0 ; i < 1024 ; i = i + 1)
161
 
162
      $display ("\nDone testing decoder.\n") ;
163
      $display ("Total error count: %d", errors);
164
      if (errors == 0) $display ("Congratulations!\n");
165
      $finish ;
166
   end // initial begin
167
 
168
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.