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[/] [qaz_libs/] [trunk/] [basal/] [src/] [gear_box/] [buffered_gear_box.v] - Blame information for rev 49

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Line No. Rev Author Line
1 34 qaztronic
// --------------------------------------------------------------------
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//
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// --------------------------------------------------------------------
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module
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  buffered_gear_box(
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    input   [12:0]  adc_bus,
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    output          adc_data_stall,
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    output  [7:0]   out,
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    input           clk_1250,
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    input           clk_250,
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    input           sys_reset
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  );
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  // --------------------------------------------------------------------
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  //
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  reg [3:0] gear_select;
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  wire      gear_reset = sys_reset | ~(gear_select < 4'hc);
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  always @( posedge clk_250 )
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    if( gear_reset )
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      gear_select <= 0;
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    else
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      gear_select <= gear_select + 1;
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  // --------------------------------------------------------------------
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  //
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  reg load_shift_r_select;
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  always @( posedge clk_250 )
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    if( sys_reset )
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      load_shift_r_select <= 0;
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    else if( gear_reset )
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      load_shift_r_select <= ~load_shift_r_select;
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  // --------------------------------------------------------------------
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  //
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  reg [3:0] counter;
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  wire      shift_en = (~gear_reset) & (counter < 4'h8);
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  always @( posedge clk_1250 )
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    if( gear_reset )
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      counter <= 0;
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    else if( shift_en )
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      counter <= counter + 1;
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  // --------------------------------------------------------------------
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  //
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  reg [103:0] shift_b0_r;
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  reg [103:0] shift_b1_r;
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  always @( posedge clk_1250 )
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    if( ~load_shift_r_select & shift_en )
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        shift_b0_r <= {adc_bus, shift_b0_r[103:13]};
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  always @( posedge clk_1250 )
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    if( load_shift_r_select & shift_en )
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        shift_b1_r <= {adc_bus, shift_b1_r[103:13]};
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  // --------------------------------------------------------------------
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  //
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  reg  [7:0] shift_b0_r_mux;
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  always @( * )
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    case( gear_select )
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      4'h0:      shift_b0_r_mux = shift_b0_r[7:0];
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      4'h1:      shift_b0_r_mux = shift_b0_r[15:8];
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      4'h2:      shift_b0_r_mux = shift_b0_r[23:16];
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      4'h3:      shift_b0_r_mux = shift_b0_r[31:24];
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      4'h4:      shift_b0_r_mux = shift_b0_r[39:32];
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      4'h5:      shift_b0_r_mux = shift_b0_r[47:40];
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      4'h6:      shift_b0_r_mux = shift_b0_r[55:48];
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      4'h7:      shift_b0_r_mux = shift_b0_r[63:56];
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      4'h8:      shift_b0_r_mux = shift_b0_r[71:64];
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      4'h9:      shift_b0_r_mux = shift_b0_r[79:72];
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      4'ha:      shift_b0_r_mux = shift_b0_r[87:80];
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      4'hb:      shift_b0_r_mux = shift_b0_r[95:88];
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      4'hc:      shift_b0_r_mux = shift_b0_r[103:96];
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      default:   shift_b0_r_mux = shift_b0_r[7:0];
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    endcase
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  // --------------------------------------------------------------------
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  //
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  reg  [7:0] shift_b1_r_mux;
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  always @( * )
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    case( gear_select )
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      4'h0:      shift_b1_r_mux = shift_b1_r[7:0];
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      4'h1:      shift_b1_r_mux = shift_b1_r[15:8];
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      4'h2:      shift_b1_r_mux = shift_b1_r[23:16];
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      4'h3:      shift_b1_r_mux = shift_b1_r[31:24];
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      4'h4:      shift_b1_r_mux = shift_b1_r[39:32];
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      4'h5:      shift_b1_r_mux = shift_b1_r[47:40];
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      4'h6:      shift_b1_r_mux = shift_b1_r[55:48];
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      4'h7:      shift_b1_r_mux = shift_b1_r[63:56];
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      4'h8:      shift_b1_r_mux = shift_b1_r[71:64];
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      4'h9:      shift_b1_r_mux = shift_b1_r[79:72];
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      4'ha:      shift_b1_r_mux = shift_b1_r[87:80];
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      4'hb:      shift_b1_r_mux = shift_b1_r[95:88];
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      4'hc:      shift_b1_r_mux = shift_b1_r[103:96];
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      default:   shift_b1_r_mux = shift_b1_r[7:0];
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    endcase
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  // --------------------------------------------------------------------
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  //
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  assign adc_data_stall = ~shift_en;
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  assign out = load_shift_r_select ? shift_b0_r_mux : shift_b1_r_mux;
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endmodule

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