1 |
4 |
danv |
#!/bin/bash -eu
|
2 |
|
|
###############################################################################
|
3 |
|
|
#
|
4 |
|
|
# Copyright (C) 2014-2018
|
5 |
|
|
# ASTRON (Netherlands Institute for Radio Astronomy)
|
6 |
|
|
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
|
7 |
|
|
#
|
8 |
|
|
# This program is free software: you can redistribute it and/or modify
|
9 |
|
|
# it under the terms of the GNU General Public License as published by
|
10 |
|
|
# the Free Software Foundation, either version 3 of the License, or
|
11 |
|
|
# (at your option) any later version.
|
12 |
|
|
#
|
13 |
|
|
# This program is distributed in the hope that it will be useful,
|
14 |
|
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
15 |
|
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
16 |
|
|
# GNU General Public License for more details.
|
17 |
|
|
#
|
18 |
|
|
# You should have received a copy of the GNU General Public License
|
19 |
|
|
# along with this program. If not, see .
|
20 |
|
|
#
|
21 |
|
|
# $Id$
|
22 |
|
|
#
|
23 |
|
|
###############################################################################
|
24 |
|
|
|
25 |
|
|
# Purpose: Compile the Altera simulation libraries
|
26 |
|
|
# Description:
|
27 |
|
|
# This script is equivalent to manually running the Quartus GUI tools/Launch simulation library compiler.
|
28 |
|
|
# However it is needed to use this script, because then the Altera libraries can be compiled with the 'vlib -type directory' option.
|
29 |
|
|
# Default 'vlib' compiles all components into a single binary but to be able to use 'mk all' it is necessary that each component
|
30 |
|
|
# is compiled into a seperate binary.
|
31 |
|
|
# Therefore this script uses 'sed' to replace 'vlib' by 'vlib -type directory' in the created Modelsim .do file and then
|
32 |
|
|
# it then runs the .do file. This needs to be done for all families (arria10) and all HDL (vhdl and verilog).
|
33 |
|
|
#
|
34 |
|
|
# > run_altera_simlib_comp unb2
|
35 |
|
|
#
|
36 |
|
|
# Then use 'sudo' to move the directory to the protected central project directory that is set by $MODEL_TECH_ALTERA_LIB.
|
37 |
|
|
#
|
38 |
|
|
|
39 |
|
|
# read generic functions/definitions
|
40 |
|
|
. ${RADIOHDL_GEAR}/generic.sh
|
41 |
|
|
|
42 |
|
|
# check the positional parameters
|
43 |
|
|
if [ $# -ne 1 ]; then
|
44 |
|
|
hdl_error $0 "Syntax: $0 buildset"
|
45 |
|
|
fi
|
46 |
|
|
|
47 |
|
|
buildset=$1
|
48 |
|
|
# read in the configuration based on the user arguments
|
49 |
|
|
. ${RADIOHDL_GEAR}/quartus/set_quartus ${buildset}
|
50 |
|
|
. ${RADIOHDL_GEAR}/modelsim/set_modelsim ${buildset}
|
51 |
|
|
|
52 |
|
|
# Select output directory for the library compilation results
|
53 |
|
|
buildset_config_file="${RADIOHDL_CONFIG}/hdl_buildset_${buildset}.cfg"
|
54 |
|
|
. ${RADIOHDL_GEAR}/set_config_variable $buildset_config_file synth_tool_name,synth_tool_version
|
55 |
|
|
OUTPUT_DIR=${RADIOHDL_BUILD_DIR}/${SYNTH_TOOL_NAME}/${SYNTH_TOOL_VERSION}
|
56 |
|
|
mkdir -p ${OUTPUT_DIR}
|
57 |
|
|
mkdir -p ${RADIOHDL_BUILD_DIR}/${buildset}
|
58 |
|
|
|
59 |
|
|
# Select FPGA device family for the library compilation
|
60 |
|
|
. ${RADIOHDL_GEAR}/set_config_variable $buildset_config_file family_names
|
61 |
|
|
|
62 |
|
|
echo ""
|
63 |
|
|
echo "Create Altera libraries for simulation with the following settings:"
|
64 |
|
|
echo " - Buildset target : ${buildset}"
|
65 |
|
|
echo " - Output directory : ${OUTPUT_DIR}"
|
66 |
|
|
echo " - FPGA device families: ${FAMILY_NAMES}"
|
67 |
|
|
echo ""
|
68 |
|
|
|
69 |
|
|
for FAMILY in $FAMILY_NAMES
|
70 |
|
|
do
|
71 |
|
|
# 2) Create Modelsim .do file for compiling the Altera simulation libraries
|
72 |
|
|
# . verilog
|
73 |
|
|
quartus_sh --simlib_comp -family ${FAMILY} \
|
74 |
|
|
-tool modelsim \
|
75 |
|
|
-tool_path $MODELSIM_DIR/$MODELSIM_PLATFORM \
|
76 |
|
|
-language verilog \
|
77 |
|
|
-directory ${OUTPUT_DIR} \
|
78 |
|
|
-log ${OUTPUT_DIR}/${FAMILY}_verilog.log \
|
79 |
|
|
-cmd_file ${FAMILY}_verilog.do \
|
80 |
|
|
-gen_only \
|
81 |
|
|
-suppress_messages
|
82 |
|
|
# . vhdl
|
83 |
|
|
quartus_sh --simlib_comp -family ${FAMILY} \
|
84 |
|
|
-tool modelsim \
|
85 |
|
|
-tool_path $MODELSIM_DIR/$MODELSIM_PLATFORM \
|
86 |
|
|
-language vhdl \
|
87 |
|
|
-directory ${OUTPUT_DIR} \
|
88 |
|
|
-log ${OUTPUT_DIR}/${FAMILY}_vhdl.log \
|
89 |
|
|
-cmd_file ${FAMILY}_vhdl.do \
|
90 |
|
|
-gen_only \
|
91 |
|
|
-suppress_messages
|
92 |
|
|
|
93 |
|
|
# Go to the output directory
|
94 |
|
|
cd ${OUTPUT_DIR}
|
95 |
|
|
|
96 |
|
|
# 3) Now use sed to replace 'vlib' by 'vlib -type directory'
|
97 |
|
|
# TODO: unb1 dependancy!!!
|
98 |
|
|
if [ "${buildset}" != "unb1" ]; then
|
99 |
|
|
sed -i 's/vlib/vlib -type directory/g' ${FAMILY}_verilog.do
|
100 |
|
|
sed -i 's/vlib/vlib -type directory/g' ${FAMILY}_vhdl.do
|
101 |
|
|
fi
|
102 |
|
|
|
103 |
|
|
# 4) Compile the Altera libraries with Modelsim
|
104 |
|
|
$MODELSIM_DIR/$MODELSIM_PLATFORM/vsim -c -do ${FAMILY}_verilog.do
|
105 |
|
|
$MODELSIM_DIR/$MODELSIM_PLATFORM/vsim -c -do ${FAMILY}_vhdl.do
|
106 |
|
|
|
107 |
|
|
# 5) Leave files for modelsim_config
|
108 |
|
|
libraryfile=${RADIOHDL_BUILD_DIR}/${buildset}/hdl_libraries_ip_${FAMILY}.txt
|
109 |
|
|
rm -f ${libraryfile}
|
110 |
|
|
grep vmap ${OUTPUT_DIR}/${FAMILY}_*.do | sort | \
|
111 |
|
|
sed "s?${OUTPUT_DIR}?\$MODEL_TECH_ALTERA_LIB?g" | while read vmap label location
|
112 |
|
|
do
|
113 |
|
|
echo "$label = $location" | sed "s/\"//g" >> ${libraryfile}
|
114 |
|
|
done
|
115 |
|
|
echo "Created ${libraryfile} for modelsim_config"
|
116 |
|
|
done
|
117 |
|
|
|
118 |
|
|
# 5) Show all errors and warnings that occured during the comiplation
|
119 |
|
|
echo
|
120 |
|
|
echo "The following warnings and error occured during the compilation:"
|
121 |
|
|
grep -i -e Warning: -e Error: -B1 ${OUTPUT_DIR}/transcript
|
122 |
|
|
|
123 |
|
|
# 6) Give user a hint what to do next
|
124 |
|
|
echo
|
125 |
|
|
echo "To finish the compilation move the directory with the compiled files to /home/software/modelsim_altera_libs with:"
|
126 |
|
|
tput bold
|
127 |
|
|
echo "sudo mv ${OUTPUT_DIR} `dirname ${MODEL_TECH_ALTERA_LIB}`"
|
128 |
|
|
tput init
|
129 |
|
|
|