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1 123 jguarin200 
--! @file dpc.vhd
2 122 jguarin200 
--! @brief Decodificador de operacion.
3 128 jguarin200 
--! @author Julián Andrés Guarín Reyes
4 122 jguarin200 
--------------------------------------------------------------
5 
-- RAYTRAC
6 
-- Author Julian Andres Guarin
7 123 jguarin200 
-- dpc.vhd
8 122 jguarin200 
-- This file is part of raytrac.
9 
--
10 
--     raytrac is free software: you can redistribute it and/or modify
11 
--     it under the terms of the GNU General Public License as published by
12 
--     the Free Software Foundation, either version 3 of the License, or
13 
--     (at your option) any later version.
14 
--
15 
--     raytrac is distributed in the hope that it will be useful,
16 
--     but WITHOUT ANY WARRANTY; without even the implied warranty of
17 
--     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18 
--     GNU General Public License for more details.
19 
--
20 
--     You should have received a copy of the GNU General Public License
21 
--     along with raytrac.  If not, see <http://www.gnu.org/licenses/>.
22 
 
23 
library ieee;
24 
use ieee.std_logic_1164.all;
25 134 jguarin200 
 
26 123 jguarin200 
entity dpc is
27 122 jguarin200 
        generic (
28 132 jguarin200 
                width : integer := 32
29 
                --!external_readable_widthad    : integer := integer(ceil(log(real(external_readable_blocks),2.0))))
30 122 jguarin200 
        );
31 
        port (
32 142 jguarin200 
                clk,rst                         : in    std_logic;
33 127 jguarin200 
                paraminput                              : in    std_logic_vector ((12*width)-1 downto 0);        --! Vectores A,B,C,D
34 
                prd32blko                               : in    std_logic_vector ((06*width)-1 downto 0);        --! Salidas de los 6 multiplicadores.
35 
                add32blko                               : in    std_logic_vector ((04*width)-1 downto 0);        --! Salidas de los 4 sumadores.
36 136 jguarin200 
                sqr32blko,inv32blko             : in    std_logic_vector (width-1 downto 0);             --! Salidas de la raiz cuadradas y el inversor.
37 138 jguarin200 
                fifo32x23_q                             : in    std_logic_vector (03*width-1 downto 0);          --! Salida de la cola intermedia.
38 127 jguarin200 
                fifo32x09_q                             : in    std_logic_vector (02*width-1 downto 0);  --! Salida de las colas de producto punto.
39 
                unary,crossprod,addsub  : in    std_logic;                                                                      --! Bit con el identificador del bloque AB vs CD e identificador del sub bloque (A/B) o (C/D).
40 142 jguarin200 
                sync_chain_d                    : in    std_logic;                                                                      --! Señal de dato valido que se va por toda la cadena de sincronizacion.
41 136 jguarin200 
                sqr32blki,inv32blki             : out   std_logic_vector (width-1 downto 0);             --! Salidas de las 2 raices cuadradas y los 2 inversores.
42 127 jguarin200 
                fifo32x26_d                             : out   std_logic_vector (03*width-1 downto 0);          --! Entrada a la cola intermedia para la normalizaci&oacute;n.
43 
                fifo32x09_d                             : out   std_logic_vector (02*width-1 downto 0);          --! Entrada a las colas intermedias del producto punto.
44 
                prd32blki                               : out   std_logic_vector ((12*width)-1 downto 0);        --! Entrada de los 12 factores en el bloque de multiplicaci&oacute;n respectivamente.
45 
                add32blki                               : out   std_logic_vector ((08*width)-1 downto 0);        --! Entrada de los 8 sumandos del bloque de 4 sumadores.
46 140 jguarin200 
                res567w,res13w,res2w,res0w,res4w,fifo32x09_w,fifo32x23_w,fifo32x09_r,fifo32x23_r: out   std_logic;
47 
                resultoutput                    : out   std_logic_vector ((08*width)-1 downto 0)         --! 8 salidas de resultados, pues lo m&aacute;ximo que podr&aacute; calcularse por cada clock son 2 vectores.
48 122 jguarin200 
        );
49 123 jguarin200 
end dpc;
50 122 jguarin200 
 
51 123 jguarin200 
architecture dpc_arch of dpc is
52 125 jguarin200 
 
53 
        constant qz : integer := 00;constant qy : integer := 01;constant qx : integer := 02;
54 123 jguarin200 
        constant az : integer := 00;constant ay : integer := 01;constant ax : integer := 02;constant bz : integer := 03;constant by : integer := 04;constant bx : integer := 05;
55 
        constant cz : integer := 06;constant cy : integer := 07;constant cx : integer := 08;constant dz : integer := 09;constant dy : integer := 10;constant dx : integer := 11;
56 
        constant f0     : integer := 00;constant f1 : integer := 01;constant f2 : integer := 02;constant f3 : integer := 03;constant f4 : integer := 04;constant f5 : integer := 05;
57 
        constant f6     : integer := 06;constant f7 : integer := 07;constant f8 : integer := 08;constant f9 : integer := 09;constant f10: integer := 10;constant f11: integer := 11;
58 
        constant s0     : integer := 00;constant s1 : integer := 01;constant s2 : integer := 02;constant s3 : integer := 03;constant s4 : integer := 04;constant s5 : integer := 05;
59 127 jguarin200 
        constant s6     : integer := 06;constant s7 : integer := 07;
60 
        constant a0     : integer := 00;constant a1 : integer := 01;constant a2 : integer := 02;constant aa : integer := 03;
61 123 jguarin200 
        constant p0     : integer := 00;constant p1 : integer := 01;constant p2 : integer := 02;constant p3 : integer := 03;constant p4 : integer := 04;constant p5 : integer := 05;
62 127 jguarin200 
 
63 124 jguarin200 
        constant dpfifoab : integer := 00;
64 
        constant dpfifocd : integer := 01;
65 
 
66 122 jguarin200 
 
67 123 jguarin200 
        type    vectorblock12 is array (11 downto 0) of std_logic_vector(width-1 downto 0);
68 127 jguarin200 
        type    vectorblock08 is array (07 downto 0) of std_logic_vector(width-1 downto 0);
69 123 jguarin200 
        type    vectorblock06 is array (05 downto 0) of std_logic_vector(width-1 downto 0);
70 127 jguarin200 
        type    vectorblock04 is array (03 downto 0) of std_logic_vector(width-1 downto 0);
71 124 jguarin200 
        type    vectorblock03 is array (02 downto 0) of std_logic_vector(width-1 downto 0);
72 123 jguarin200 
        type    vectorblock02 is array (01 downto 0) of std_logic_vector(width-1 downto 0);
73 122 jguarin200 
 
74 127 jguarin200 
 
75 
        signal sparaminput,sfactor                      : vectorblock12;
76 
        signal ssumando,sresult                         : vectorblock08;
77 
        signal sprd32blk                                        : vectorblock06;
78 
        signal sadd32blk                                        : vectorblock04;
79 125 jguarin200 
        signal snormfifo_q,snormfifo_d          : vectorblock03;
80 127 jguarin200 
        signal sdpfifo_q                                        : vectorblock02;
81 
        signal ssqr32blk,sinv32blk                      : std_logic_vector(width-1 downto 0);
82 123 jguarin200 
 
83 142 jguarin200 
        signal ssync_chain                                      : std_logic_vector(28 downto 0);
84 
        signal ssync_chain_d                                    : std_logic;
85 140 jguarin200 
        constant rstMasterValue : std_logic := '0';
86 
 
87 123 jguarin200 
begin
88 122 jguarin200 
 
89 142 jguarin200 
        --! Cadena de sincronizaci&oacute;n: 29 posiciones.
90 
        ssync_chain_d <= sync_chain_d;
91 140 jguarin200 
        sync_chain_proc:
92 
        process(clk,rst)
93 
        begin
94 
                if rst=rstMasterValue then
95 142 jguarin200 
                        ssync_chain <= (others => '0');
96 140 jguarin200 
                elsif clk'event and clk='1' then
97 142 jguarin200 
                        ssync_chain(0) <= ssync_chain_d;
98 
                        for i in 28 downto 1 loop
99 
                                ssync_chain(i) <= ssync_chain(i-1);
100 140 jguarin200 
                        end loop;
101 
                end if;
102 
        end process sync_chain_proc;
103 
        --! Escritura en las colas de resultados y escritura/lectura en las colas intermedias mediante cadena de resultados.
104 142 jguarin200 
        fifo32x09_w <= ssync_chain(4);
105 
        fifo32x23_w <= ssync_chain(0);
106 
        fifo32x09_r <= ssync_chain(12);
107 
        fifo32x23_r <= ssync_chain(23);
108 127 jguarin200 
 
109 142 jguarin200 
        res0w <= ssync_chain(22);
110 
        res4w <= ssync_chain(20);
111 140 jguarin200 
        sync_chain_comb:
112 142 jguarin200 
        process (ssync_chain,addsub,crossprod,unary)
113 140 jguarin200 
        begin
114 
                if unary='1' then
115 142 jguarin200 
                        res567w <= ssync_chain(27);
116 140 jguarin200 
                else
117 142 jguarin200 
                        res567w <= ssync_chain(3);
118 140 jguarin200 
                end if;
119 127 jguarin200 
 
120 140 jguarin200 
                if addsub='1' then
121 142 jguarin200 
                        res13w <= ssync_chain(8);
122 
                        res2w <= ssync_chain(8);
123 140 jguarin200 
                else
124 142 jguarin200 
                        res13w <= ssync_chain(12);
125 140 jguarin200 
                        if crossprod='1' then
126 142 jguarin200 
                                res2w <= ssync_chain(12);
127 140 jguarin200 
                        else
128 142 jguarin200 
                                res2w <= ssync_chain(21);
129 140 jguarin200 
                        end if;
130 
                end if;
131 
        end process sync_chain_comb;
132 
 
133 
 
134 
        --! El siguiente c&oacute;digo sirve para conectar arreglos a se&ntilde;ales std_logic_1164, simplemente son abstracciones a nivel de c&oacute;digo y no representar&aacute; cambios en la s&iacute;ntesis.
135 123 jguarin200 
        stuff12:
136 
        for i in 11 downto 0 generate
137 
                sparaminput(i) <= paraminput(i*width+width-1 downto i*width);
138 
                prd32blki(i*width+width-1 downto i*width) <= sfactor(i);
139 127 jguarin200 
        end generate stuff12;
140 
        stuff08:
141 
        for i in 07 downto 0 generate
142 123 jguarin200 
                add32blki(i*width+width-1 downto i*width) <= ssumando(i);
143 127 jguarin200 
                resultoutput(i*width+width-1 downto i*width) <= sresult(i);
144 
        end generate stuff08;
145 138 jguarin200 
        stuff04:
146 
        for i in 03 downto 1 generate
147 
                sadd32blk(i)  <= add32blko(i*width+width-1 downto i*width);
148 
        end generate stuff04;
149 
 
150 
 
151 124 jguarin200 
        stuff03:
152 
        for i in 02 downto 0 generate
153 138 jguarin200 
                snormfifo_q(i) <= fifo32x23_q(i*width+width-1 downto i*width);
154 124 jguarin200 
                fifo32x26_d(i*width+width-1 downto i*width) <= snormfifo_d(i);
155 
        end generate stuff03;
156 
 
157 123 jguarin200 
        stuff02:
158 127 jguarin200 
        for i in 01 downto 0 generate
159 
                sdpfifo_q(i)  <= fifo32x09_q(i*width+width-1 downto i*width);
160 123 jguarin200 
        end generate stuff02;
161 140 jguarin200 
 
162 
        --! El siguiente c&oacute;digo sirve para conectar arreglos a se&ntilde;ales std_logic_1164, son abstracciones de c&oacute;digo tambi&eacute;n, sin embargo se realizan a trav&eacute;s de registros.
163 
        register_products_outputs:
164 
        process (clk)
165 
        begin
166 
                if clk'event and clk='1' then
167 
                        for i in 05 downto 0 loop
168 
                                sprd32blk(i)  <= prd32blko(i*width+width-1 downto i*width);
169 
                        end loop;
170 
                end if;
171 
        end process;
172 
        --! Los productos del multiplicador 2 y 3, ya registrados dentro de dpc van a la cola intermedia del producto punto (fifo32x09_d)
173 124 jguarin200 
        fifo32x09_d <= sprd32blk(p3)&sprd32blk(p2);
174 140 jguarin200 
        register_adder0_and_inversor_output:
175 
        process (clk)
176 
        begin
177 
                if clk'event and clk='1' then
178 
                        sadd32blk(a0)  <= add32blko(a0*width+width-1 downto a0*width);
179 
                        sinv32blk <= inv32blko;
180 
                end if;
181 
        end process;
182 122 jguarin200 
 
183 127 jguarin200 
 
184 
 
185 140 jguarin200 
 
186 
 
187 127 jguarin200 
        ssqr32blk <= sqr32blko;
188 
 
189 136 jguarin200 
        --! Colas de salida de los distintos resultados;
190 127 jguarin200 
        sresult(0) <= ssqr32blk;
191 
        sresult(1) <= sadd32blk(a0);
192 
        sresult(2) <= sadd32blk(a1);
193 
        sresult(3) <= sadd32blk(a2);
194 
        sresult(4) <= sadd32blk(aa);
195 
        sresult(5) <= sprd32blk(p3);
196 
        sresult(6) <= sprd32blk(p4);
197 
        sresult(7) <= sprd32blk(p5);
198 
 
199 
        --! Cola de normalizacion
200 
        snormfifo_d(qx) <= sparaminput(ax);
201 
        snormfifo_d(qy) <= sparaminput(ay);
202 
        snormfifo_d(qz) <= sparaminput(az);
203 
 
204 
 
205 
 
206 136 jguarin200 
        --! La entrada al inversor SIEMPRE viene con la salida de la raiz cuadrada
207 
        inv32blki <= sqr32blko;
208 139 jguarin200 
        --! La entrada de la ra�z cuadrada SIEMPRE viene con la salida del sumador 1.
209 136 jguarin200 
        sqr32blki <= sadd32blk(a1);
210 127 jguarin200 
 
211 
 
212 136 jguarin200 
 
213 
        --! Conectar las entradas del sumador a, a la salida
214 
        ssumando(s6) <= sadd32blk(a2);
215 
        ssumando(s7) <= sdpfifo_q(dpfifocd);
216 
 
217 
 
218 142 jguarin200 
        mul:process(unary,addsub,crossprod,sparaminput,sinv32blk,sprd32blk,sadd32blk,sdpfifo_q,snormfifo_q)
219 123 jguarin200 
        begin
220 124 jguarin200 
 
221 142 jguarin200 
                sfactor(f4) <= sparaminput(az);
222 127 jguarin200 
                if unary='1' then
223 
                        --! Magnitud y normalizacion
224 
                        sfactor(f0) <= sparaminput(ax);
225 
                        sfactor(f1) <= sparaminput(ax);
226 
                        sfactor(f2) <= sparaminput(ay);
227 
                        sfactor(f3) <= sparaminput(ay);
228 142 jguarin200 
 
229 127 jguarin200 
                        sfactor(f5) <= sparaminput(az);
230 142 jguarin200 
                        if crossprod='1' and addsub='1' then
231 
                                sfactor(f6) <= sparaminput(cx);
232 
                                sfactor(f7) <= sparaminput(dx);
233 
                                sfactor(f8) <= sparaminput(cy);
234 
                                sfactor(f9) <= sparaminput(dx);
235 
                                sfactor(f10) <= sparaminput(cz);
236 
                                sfactor(f11) <= sparaminput(dx);
237 
                        else
238 
                                sfactor(f6) <= snormfifo_q(ax);
239 
                                sfactor(f7) <= sinv32blk;
240 
                                sfactor(f8) <= snormfifo_q(ay);
241 
                                sfactor(f9) <= sinv32blk;
242 
                                sfactor(f10) <= snormfifo_q(az);
243 
                                sfactor(f11) <= sinv32blk;
244 
                        end if;
245 
 
246 
 
247 
                elsif addsub='0' then
248 
                        --! Solo productos punto o cruz
249 
                        if crossprod='1' then
250 
 
251 
                                sfactor(f0) <= sparaminput(ay);
252 
                                sfactor(f1) <= sparaminput(bz);
253 
                                sfactor(f2) <= sparaminput(az);
254 
                                sfactor(f3) <= sparaminput(by);
255 
 
256 
                                sfactor(f5) <= sparaminput(bx);
257 
                                sfactor(f6) <= sparaminput(ax);
258 
                                sfactor(f7) <= sparaminput(bz);
259 
                                sfactor(f8) <= sparaminput(ax);
260 
                                sfactor(f9) <= sparaminput(by);
261 
                                sfactor(f10) <= sparaminput(ay);
262 
                                sfactor(f11) <= sparaminput(bx);
263 
 
264 
                        else
265 
 
266 
                                sfactor(f0) <=  sparaminput(ax) ;
267 
                                sfactor(f1) <=  sparaminput(bx) ;
268 
                                sfactor(f2) <=  sparaminput(ay) ;
269 
                                sfactor(f3) <=  sparaminput(by) ;
270 
                                sfactor(f5) <=  sparaminput(bz) ;
271 
                                sfactor(f6) <=  sparaminput(cx) ;
272 
                                sfactor(f7) <=  sparaminput(dx) ;
273 
                                sfactor(f8) <=  sparaminput(cy) ;
274 
                                sfactor(f9) <=  sparaminput(dy) ;
275 
                                sfactor(f10) <= sparaminput(cz) ;
276 
                                sfactor(f11) <= sparaminput(dz) ;
277 
                        end if;
278 
 
279 127 jguarin200 
                else
280 
                        sfactor(f0) <=  sparaminput(ax) ;
281 
                        sfactor(f1) <=  sparaminput(bx) ;
282 
                        sfactor(f2) <=  sparaminput(ay) ;
283 
                        sfactor(f3) <=  sparaminput(by) ;
284 
                        sfactor(f5) <=  sparaminput(bz) ;
285 
                        sfactor(f6) <=  sparaminput(cx) ;
286 
                        sfactor(f7) <=  sparaminput(dx) ;
287 
                        sfactor(f8) <=  sparaminput(cy) ;
288 
                        sfactor(f9) <=  sparaminput(dx) ;
289 
                        sfactor(f10) <= sparaminput(cz) ;
290 
                        sfactor(f11) <= sparaminput(dx) ;
291 125 jguarin200 
                end if;
292 127 jguarin200 
 
293 136 jguarin200 
 
294 127 jguarin200 
                if addsub='1' then
295 
                        ssumando(s0) <= sparaminput(ax);
296 
                        ssumando(s1) <= sparaminput(bx);
297 
                        ssumando(s2) <= sparaminput(ay);
298 
                        ssumando(s3) <= sparaminput(by);
299 
                        ssumando(s4) <= sparaminput(az);
300 
                        ssumando(s5) <= sparaminput(bz);
301 
                else
302 
                        ssumando(s0) <= sprd32blk(p0);
303 
                        ssumando(s1) <= sprd32blk(p1);
304 132 jguarin200 
                        if crossprod='0' then
305 
                                ssumando(s2) <= sadd32blk(a0);
306 
                                ssumando(s3) <= sdpfifo_q(dpfifoab);
307 
                        else
308 
                                ssumando(s2) <= sprd32blk(p2);
309 
                                ssumando(s3) <= sprd32blk(p3);
310 
                        end if;
311 127 jguarin200 
                        ssumando(s4) <= sprd32blk(p4);
312 
                        ssumando(s5) <= sprd32blk(p5);
313 
                end if;
314 123 jguarin200 
        end process;
315 
 
316 
 
317 127 jguarin200 
 
318 
 
319 
--      interconnection:process(instr3,hblockslab,abblockslab,cdblockslab,sparaminput,sprd32blk,sadd32blk,sdpfifo_q)
320 
--      begin
321 
--              --! La cola para la normalizacion de los vectores.
322 
--              snormfifo_d(qx) <= (hblockslab and ((cdblockslab and sparaminput(dx))or(not(cdblockslab) and sparaminput(cx)))) or (not(hblockslab) and ((abblockslab and sparaminput(bx))or(not(abblockslab) and sparaminput(ax))));
323 
--              snormfifo_d(qy) <= (hblockslab and ((cdblockslab and sparaminput(dy))or(not(cdblockslab) and sparaminput(cy)))) or (not(hblockslab) and ((abblockslab and sparaminput(by))or(not(abblockslab) and sparaminput(ay))));
324 
--              snormfifo_d(qz) <= (hblockslab and ((cdblockslab and sparaminput(dz))or(not(cdblockslab) and sparaminput(cz)))) or (not(hblockslab) and ((abblockslab and sparaminput(bz))or(not(abblockslab) and sparaminput(az))));
325 
--
326 
--              --! Combinatorio para decidir que operaciones realizan los sumadores / restadores.
327 
--              add32blks <= (instr3(0) xor (instr3(1) xor instr3(0)))&(instr3(0) xor (instr3(1) xor instr3(0))) ;
328 
--
329 
--              --! Por defecto conectar los sumandos en producto punto/cruz
330 
--              ssumando(s0) <= sprd32blk(p0);ssumando(s1) <= sprd32blk(p1);
331 
--              ssumando(s6) <= sadd32blk(a0);ssumando(s7) <= sdpfifo_q(dpfifoab);
332 
--              ssumando(s10) <= sdpfifo_q(dpfifocd);ssumando(s11) <= sadd32blk(a2);
333 
--              ssumando(s4) <= sprd32blk(p4);ssumando(s5) <= sprd32blk(p5);
334 
--              ssumando(s2) <= sprd32blk(p2);ssumando(s3) <= sprd32blk(p3);
335 
--
336 
--              --! El segundo sumador del segundo bloque siempre sera suma o resta independiente de la operacion
337 
--              ssumando(s8) <= sparaminput(cy);ssumando(s9) <= sparaminput(dy);
338 
--
339 
--              --! Por defecto conectar los factores en producto punto
340 
--              sfactor(f0) <= sparaminput(ax);sfactor(f1) <= sparaminput(bx);
341 
--              sfactor(f2) <= sparaminput(ay);sfactor(f3) <= sparaminput(by);
342 
--              sfactor(f4) <= sparaminput(az);sfactor(f5) <= sparaminput(bz);
343 
--              sfactor(f6) <= sparaminput(bx);sfactor(f7) <= sparaminput(dx);
344 
--              sfactor(f8) <= sparaminput(by);sfactor(f9) <= sparaminput(dy);
345 
--              sfactor(f10) <= sparaminput(bz);sfactor(f11) <= sparaminput(dz);
346 
--
347 
--              --!Los resultados por defecto se acomodan al producto punto y parcialmente a los productos simple y escalar.
348 
--              sresult(ax) <= sadd32blk(aa);
349 
--              sresult(ay) <= sprd32blk(p1);
350 
--              sresult(az) <= sprd32blk(p2);
351 
--              sresult(bx) <= sadd32blk(ac);
352 
--              sresult(by) <= sprd32blk(p4);
353 
--              sresult(bz) <= sprd32blk(p5);
354 
--
355 
--              if (instr3(2 downto 1)="11" or instr3="100") then
356 
--                      sresult(ax) <= sprd32blk(p0);
357 
--                      sresult(bx) <= sprd32blk(p3);
358 
--              elsif instr3(0)='1' then
359 
--                      sresult(ax) <= sprd32blk(a0);
360 
--                      sresult(ay) <= sprd32blk(a1);
361 
--                      sresult(az) <= sprd32blk(a2);
362 
--                      sresult(bx) <= sadd32blk(aa);
363 
--                      sresult(by) <= sprd32blk(ab);
364 
--                      sresult(bz) <= sadd32blk(ac);
365 
--              elsif instr3(1)='1' then
366 
--                      sresult(ax) <= ssqr32blk(sqrt320);
367 
--                      sresult(bx) <= ssqr32blk(sqrt321);
368 
--              end if;
369 
--
370 
--
371 
--              if instr3(0)='1' then   --! Producto Cruz, suma, resta, multiplicacion simple
372 
--
373 
--                      if (instr3(2) or instr3(1))='1' then --! Suma, Resta, Multiplicacion simple
374 
--
375 
--                              --! Conectar las entradas de los sumadores en suma o resta de vectores
376 
--                              ssumando(s0) <= sparaminput(ax);ssumando(s1) <= sparaminput(bx);
377 
--                              ssumando(s2) <= sparaminput(ay);ssumando(s3) <= sparaminput(by);
378 
--                              ssumando(s4) <= sparaminput(az);ssumando(s5) <= sparaminput(bz);
379 
--                              ssumando(s6) <= sparaminput(cx);ssumando(s7) <= sparaminput(dx);
380 
--                              ssumando(s10) <= sparaminput(cz);ssumando(s11) <= sparaminput(dz);
381 
--
382 
--                      else --! Producto Cruz!
383 
--
384 
--                              if hblock='1' then      --! Producto crux CxD
385 
--                                      --!Multiplicadores:
386 
--                                      sfactor(f0) <= sparaminput(cy);sfactor(f1) <= sparaminput(dz);sfactor(f2) <= sparaminput(cz);sfactor(f3) <= sparaminput(dy);
387 
--                                      sfactor(f4) <= sparaminput(cx);sfactor(f5) <= sparaminput(dz);sfactor(f6) <= sparaminput(cz);sfactor(f7) <= sparaminput(dx);
388 
--                                      sfactor(f8) <= sparaminput(cx);sfactor(f9) <= sparaminput(dy);sfactor(f10) <= sparaminput(cy);sfactor(f11) <= sparaminput(dx);
389 
--                              else                            --! Producto crux AxD
390 
--                                      --!Multiplicadores:
391 
--                                      sfactor(f0) <= sparaminput(ay);sfactor(f1) <= sparaminput(bz);sfactor(f2) <= sparaminput(az);sfactor(f3) <= sparaminput(by);
392 
--                                      sfactor(f4) <= sparaminput(ax);sfactor(f5) <= sparaminput(bz);sfactor(f6) <= sparaminput(az);sfactor(f7) <= sparaminput(bx);
393 
--                                      sfactor(f8) <= sparaminput(ax);sfactor(f9) <= sparaminput(by);sfactor(f10) <= sparaminput(ay);sfactor(f11) <= sparaminput(bx);
394 
--                              end if;
395 
--
396 
--                      end if;
397 
--
398 
--              else                                    --! Producto Punto, magnitud, producto escalar y normalizacion
399 
--                      if instr3(2)='1' then           --!Producto Escalar (INSTR3(1)=0) o Normalizacion (INSTR3(1)=1)
400 
--
401 
--                              sfactor(f0) <= (not instr31slab and sparaminput(ax)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(ax)) or(abblockslab and sparaminput(bx))))or( hblockslab and snormfifo_q(qx)) ) );
402 
--                              sfactor(f1) <= (not instr31slab and sparaminput(bx)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(ax)) or(abblockslab and sparaminput(bx))))or( hblockslab and sinv32blk(invr321)) ) );
403 
--                              sfactor(f2) <= (not instr31slab and sparaminput(ay)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(ay)) or(abblockslab and sparaminput(by))))or( hblockslab and snormfifo_q(qy)) ) );
404 
--                              sfactor(f3) <= (not instr31slab and sparaminput(bx)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(ay)) or(abblockslab and sparaminput(by))))or( hblockslab and sinv32blk(invr321)) ) );
405 
--                              sfactor(f4) <= (not instr31slab and sparaminput(az)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(az)) or(abblockslab and sparaminput(bz))))or( hblockslab and snormfifo_q(qz)) ) );
406 
--                              sfactor(f5) <= (not instr31slab and sparaminput(bx)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(az)) or(abblockslab and sparaminput(bz))))or( hblockslab and sinv32blk(invr321)) ) );
407 
--                              sfactor(f6) <= (not instr31slab and sparaminput(cx)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cx)) or(cdblockslab and sparaminput(dx))))or( not(hblockslab) and snormfifo_q(qx)) ) );
408 
--                              sfactor(f7) <= (not instr31slab and sparaminput(dx)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cx)) or(cdblockslab and sparaminput(dx))))or( not(hblockslab) and sinv32blk(invr320)) ) );
409 
--                              sfactor(f8) <= (not instr31slab and sparaminput(cy)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cy)) or(cdblockslab and sparaminput(dy))))or( not(hblockslab) and snormfifo_q(qy)) ) );
410 
--                              sfactor(f9) <= (not instr31slab and sparaminput(dx)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cy)) or(cdblockslab and sparaminput(dy))))or( not(hblockslab) and sinv32blk(invr320)) ) );
411 
--                              sfactor(f10) <= (not instr31slab and sparaminput(cz)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cz)) or(cdblockslab and sparaminput(dz))))or( not(hblockslab) and snormfifo_q(qz)) ) );
412 
--                              sfactor(f11) <= (not instr31slab and sparaminput(dx)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cz)) or(cdblockslab and sparaminput(dz))))or( not(hblockslab) and sinv32blk(invr320)) ) );
413 
--                      elsif instr3(1)='1' then        --!Magnitud. El producto punto no se computa porque los factores estan por defecto configurados en producto punto.
414 
--                              sfactor(f0) <= (not(abblockslab) and sparaminput(ax))or(abblockslab and sparaminput(bx));
415 
--                              sfactor(f1) <= (not(abblockslab) and sparaminput(ax))or(abblockslab and sparaminput(bx));
416 
--                              sfactor(f2) <= (not(abblockslab) and sparaminput(ay))or(abblockslab and sparaminput(by));
417 
--                              sfactor(f3) <= (not(abblockslab) and sparaminput(ay))or(abblockslab and sparaminput(by));
418 
--                              sfactor(f4) <= (not(abblockslab) and sparaminput(az))or(abblockslab and sparaminput(bz));
419 
--                              sfactor(f5) <= (not(abblockslab) and sparaminput(az))or(abblockslab and sparaminput(bz));
420 
--                              sfactor(f6) <= (not(cdblockslab) and sparaminput(cx))or(cdblockslab and sparaminput(dx));
421 
--                              sfactor(f7) <= (not(cdblockslab) and sparaminput(cx))or(cdblockslab and sparaminput(dx));
422 
--                              sfactor(f8) <= (not(cdblockslab) and sparaminput(cy))or(cdblockslab and sparaminput(dy));
423 
--                              sfactor(f9) <= (not(cdblockslab) and sparaminput(cy))or(cdblockslab and sparaminput(dy));
424 
--                              sfactor(f10) <= (not(cdblockslab) and sparaminput(cz))or(cdblockslab and sparaminput(dz));
425 
--                              sfactor(f11) <= (not(cdblockslab) and sparaminput(cz))or(cdblockslab and sparaminput(dz));
426 
--
427 
--                      end if;
428 
--              end if;
429 
--
430 
--      end process;
431 
--
432 
 
433 123 jguarin200 
end dpc_arch;

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