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1 118 jguarin200
------------------------------------------------
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--! @file fadd32.vhd
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--! @brief RayTrac Floating Point Adder  
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--! @author Julián Andrés Guarín Reyes
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--------------------------------------------------
6
 
7
 
8
-- RAYTRAC (FP BRANCH)
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-- Author Julian Andres Guarin
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-- fadd32.vhd
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-- This file is part of raytrac.
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-- 
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--     raytrac is free software: you can redistribute it and/or modify
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--     it under the terms of the GNU General Public License as published by
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--     the Free Software Foundation, either version 3 of the License, or
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--     (at your option) any later version.
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-- 
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--     raytrac is distributed in the hope that it will be useful,
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--     but WITHOUT ANY WARRANTY; without even the implied warranty of
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--     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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--     GNU General Public License for more details.
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-- 
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--     You should have received a copy of the GNU General Public License
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--     along with raytrac.  If not, see <http://www.gnu.org/licenses/>
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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library lpm;
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use lpm.all;
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--! Esta entidad recibe dos n&uacutemeros en formato punto flotante IEEE 754, de precision simple y devuelve las mantissas signadas y corridas, y el exponente correspondiente al resultado antes de normalizarlo al formato float. 
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--!\nLas 2 mantissas y el exponente entran despues a la entidad add2 que suma las mantissas y entrega el resultado en formato IEEE 754.
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entity fadd32 is
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        generic (
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                propagation_chain : string := "ON"
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        );
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        port (
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                clk,dpc,prop_in : in std_logic;
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                a32,b32         : in std_logic_vector (31 downto 0);
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                c32,prop_out            : out std_logic_vector(31 downto 0)
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        );
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end fadd32;
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architecture fadd32_arch of fadd32 is
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        component lpm_mult
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        generic (
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                lpm_hint                        : string;
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                lpm_representation      : string;
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                lpm_type                        : string;
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                lpm_widtha                      : natural;
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                lpm_widthb                      : natural;
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                lpm_widthp                      : natural
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        );
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        port (
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                dataa   : in std_logic_vector ( lpm_widtha-1 downto 0 );
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                datab   : in std_logic_vector ( lpm_widthb-1 downto 0 );
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                result  : out std_logic_vector( lpm_widthp-1 downto 0 )
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        );
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        end component;
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        signal s1zero,s5tokena,s5tokenb,s5tokenc,s7sign                                                                                 : std_logic;
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        signal s5token                                                                                                                                          : std_logic_vector(2 downto 0);
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        signal s1delta                                                                                                                                          : std_logic_vector(5 downto 0);
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        signal s0delta,s1exp,s2exp,s3exp,s4exp,s5exp,s6exp,s5factor,s6factor,s7exp,s7factor     : std_logic_vector(7 downto 0);
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        signal s1shifter,s5factorhot9,s6factorhot9                                                                                      : std_logic_vector(8 downto 0);
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        signal s1pl,s6pl                                                                                                                                        : std_logic_vector(17 downto 0);
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        signal s6postshift,s7postshift                                                                                                          : std_logic_vector(22 downto 0);
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        signal s1umantshift,s1umantfixed,s1postshift,s1xorslab,s2xorslab                                        : std_logic_vector(23 downto 0);
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        signal s5factorhot24                                                                                                                            : std_logic_vector(23 downto 0);
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        signal s2umantshift,s2mantfixed,s3mantfixed,s3mantshift,s4xorslab                                       : std_logic_vector(24 downto 0);
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        signal s4sresult,s5result,s6result                                                                                                      : std_logic_vector(25 downto 0); -- Signed mantissa result
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        signal s1ph,s6ph                                                                                                                                        : std_logic_vector(26 downto 0);
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        signal s0a,s0b                                                                                                                                          : std_logic_vector(31 downto 0); -- Float 32 bit 
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        signal sxprop : std_logic_vector(7 downto 0);
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begin
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        propagation:
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        if propagation_chain="ON" generate
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                prop_out <= sxprop(7);
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                process (clk)
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                begin
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                        if clk'event and clk='1' then
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                                for i in 7 downto 1 loop
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                                        sxprop(i) <= sxprop(i-1);
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                                end loop;
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                                sxprop(0) <= prop_in;
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                        end if;
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                end process;
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        end generate propagation ;
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        process (clk)
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        begin
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                if clk'event and clk='1'  then
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93
                        --!Registro de entrada
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                        s0a <= a32;
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                        s0b(31) <= dpc xor b32(31);     --! Importante: Integrar el signo en el operando B
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                        s0b(30 downto 0) <= b32(30 downto 0);
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                        --!Etapa 0,Escoger el mayor exponente que sera el resultado desnormalizado, calcula cuanto debe ser el corrimiento de la mantissa con menor exponente y reorganiza los operandos, si el mayor es b, intercambia las posici&oacute;n si el mayor es a las posiciones la mantiene. Zero check.
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                        --!signo,exponente,mantissa
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                        if (s0b(30 downto 23)&s0a(30 downto 23))=x"0000" then
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                                s1zero <= '0';
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                        else
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                                s1zero <= '1';
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                        end if;
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                        s1delta <= s0delta(7) & (s0delta(7) xor s0delta(4))&(s0delta(7) xor s0delta(3)) & s0delta(2 downto 0);
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                        case s0delta(7) is
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                                when '1'  =>
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                                        s1exp <= s0b(30 downto 23);
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                                        s1umantshift <= s0a(31)&s0a(22 downto 0);
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                                        s1umantfixed <= s0b(31)&s0b(22 downto 0);
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                                when others =>
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                                        s1exp <= s0a(30 downto 23);
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                                        s1umantshift <= s0b(31)&s0b(22 downto 0);
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                                        s1umantfixed <= s0a(31)&s0a(22 downto 0);
115
                        end case;
116
 
117
                        --! Etapa 1: Denormalizaci&oacute;n de la mantissas.  
118
                        case s1delta(4 downto 3) is
119
                                when "00" =>    s2umantshift <= s1umantshift(23)&s1postshift(23 downto 0);
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                                when "01" =>    s2umantshift <= s1umantshift(23)&x"00"&s1postshift(23 downto 8);
121
                                when "10" =>    s2umantshift <= s1umantshift(23)&x"0000"&s1postshift(23 downto 16);
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                                when others =>  s2umantshift <= (others => '0');
123
                        end case;
124
                        s2mantfixed <= s1umantfixed(23) &         ( ( ('1'&s1umantfixed(22 downto 0)) xor s1xorslab)   + ( x"00000"&"000"&s1umantfixed(23)  )   );
125
                        s2exp  <= s1exp;
126
 
127
                        --! Etapa2: Signar la mantissa denormalizada.
128
                        s3mantfixed <= s2mantfixed;
129
                        s3mantshift <= s2umantshift(24)&         (  (      s2umantshift(23 downto 0)  xor s2xorslab)   + ( x"00000"&"000"&s2umantshift(24)  )   );
130
                        s3exp           <= s2exp;
131
 
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                        --! Etapa 3: Etapa 3 Realizar la suma, entre la mantissa corrida y la fija.
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                        s4sresult       <= (s3mantshift(24)&s3mantshift)+(s3mantfixed(24)&s3mantfixed);
134
                        s4exp           <= s3exp;
135
 
136
                        --! Etapa 4: Quitar el signo a la mantissa resultante.
137
                        s5result        <= s4sresult(25)&((s4sresult(24 downto 0) xor s4xorslab)  +(x"000000"&s4sresult(25)));
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                        s5exp           <= s4exp;
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140
 
141
                        --! Etapa 5: Codificar el corrimiento para la normalizacion de la mantissa resultante.
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                        s6result                <= s5result;
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                        s6exp                   <= s5exp;
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                        s6factor                <= s5factor;
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                        s6factorhot9    <= s5factorhot9;
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                        --! Etapa 6: Ejecutar el corrimiento de la mantissa.
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                        s7sign                  <= s6result(25);
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                        s7exp                   <= s6exp;
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                        s7factor                <= s6factor;
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                        s7postshift             <= s6postshift;
152
 
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                end if;
155
        end process;
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157
        --! Etapa 7: Entregar el resultado.
158
        c32(31) <= s7sign;
159
        process(s7exp,s7postshift,s7factor)
160
        begin
161
                c32(30 downto 23)       <= s7exp+s7factor;
162
                case s7factor(4 downto 3) is
163
                        when "01"       => c32(22 downto 0) <= s7postshift(14 downto 00)&x"00";
164
                        when "10"       => c32(22 downto 0) <= s7postshift(06 downto 00)&x"0000";
165
                        when others => c32(22 downto 0)  <= s7postshift;
166
                end case;
167
        end process;
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        --! Combinatorial gremlin, Etapa 0 el corrimiento de la mantissa con menor exponente y reorganiza los operandos,\n
169
        --! si el mayor es b, intercambia las posici&oacute;n si el mayor es a las posiciones la mantiene. 
170
        s0delta <=  s0a(30 downto 23)-s0b(30 downto 23);
171
        --! Combinatorial Gremlin, Etapa 1 Codificar el factor de corrimiento de denormalizacion y denormalizar la mantissa no fija. Signar la mantissa que se queda fija.
172
        decodeshiftfactor:
173
        process (s1delta(2 downto 0))
174
        begin
175
                case s1delta(2 downto 0) is
176
                        when "111" =>  s1shifter(8 downto 0) <= '0'&s1delta(5)&"00000"&not(s1delta(5))&'0';
177
                        when "110" =>  s1shifter(8 downto 0) <= "00"&s1delta(5)&"000"&not(s1delta(5))&"00";
178
                        when "101" =>  s1shifter(8 downto 0) <= "000"&s1delta(5)&'0'&not(s1delta(5))&"000";
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                        when "100" =>  s1shifter(8 downto 0) <= '0'&x"10";
180
                        when "011" =>  s1shifter(8 downto 0) <= "000"&not(s1delta(5))&'0'&s1delta(5)&"000";
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                        when "010" =>  s1shifter(8 downto 0) <= "00"&not(s1delta(5))&"000"&s1delta(5)&"00";
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                        when "001" =>  s1shifter(8 downto 0) <= '0'&not(s1delta(5))&"00000"&s1delta(5)&'0';
183
                        when others => s1shifter(8 downto 0) <=    not(s1delta(5))&"0000000"&s1delta(5);
184
                end case;
185
        end process;
186
        denormhighshiftermult:lpm_mult
187
        generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,18,27)
188
        port    map (s1shifter,s1zero&s1umantshift(22 downto 06),s1ph);
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        denormlowshiftermult:lpm_mult
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        generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,9,18)
191
        port    map (s1shifter,s1umantshift(5 downto 0)&"000",s1pl);
192
 
193
        s1postshift(23 downto 7) <= s1ph(25 downto 9);
194
        s1postshift(06 downto 0) <= s1ph(08 downto 2) or s1pl(17 downto 11);
195
        s1xorslab(23 downto 0) <= (others => s1umantfixed(23));
196
 
197
        --! Combinatorial Gremlin, Etapa 2: Signar la mantissa denormalizada. 
198
        s2xorslab <= (others => s2umantshift(24));
199
 
200
        --! Combinatorial Gremlin, Etapa 4: Quitar el signo de la mantissa resultante.
201
        s4xorslab <= (others => s4sresult(25));
202
 
203
        --! Combinatorial Gremlin, Etapa 5: Codificar el factor de normalizacion de la mantissa resultante.
204
        normalizerdecodeshift:
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        process (s5result,s5factorhot24,s5token,s5tokena,s5tokenb,s5tokenc,s5factorhot9)
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        begin
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                s5tokena <= not(s5result(24));
208
                s5tokenb <= not(s5result(24));
209
                s5tokenc <= not(s5result(24));
210
                s5factor(7 downto 5) <= (others => s5result(24));
211
                s5factorhot24 <= x"000000";
212
                for i in 23 downto 16 loop
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                        if s5result(i)='1' then
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                                s5factorhot24(23-i) <= s5tokena;
215
                                s5tokenb <= '0';
216
                                s5tokenc <= '0';
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                                exit;
218
                        end if;
219
                end loop;
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                for i in 15 downto 8 loop
221
                        if s5result(i)='1' then
222
                                s5factorhot24(23-i) <= s5tokenb;
223
                                s5tokenc <= '0';
224
                                exit;
225
                        end if;
226
                end loop;
227
                for i in 7 downto 0 loop
228
                        if s5result(i)='1' then
229
                                s5factorhot24(23-i) <= s5tokenc;
230
                                exit;
231
                        end if;
232
                end loop;
233
                s5token <=s5tokena&s5tokenb&s5tokenc;
234
                case (s5token) is
235
                        when "100"  => s5factor(4 downto 3) <= "10";
236
                        when "110"  => s5factor(4 downto 3) <= "01";
237
                        when "111"      => s5factor(4 downto 3) <= "00";
238
                        when others => s5factor(4 downto 3) <= (others => s5result(24));
239
                end case;
240
                s5factorhot9 <= (s5factorhot24(7 downto 0)or s5factorhot24(15 downto 8)or s5factorhot24(23 downto 16)) & s5result(24);
241
                case s5factorhot9 is
242
                        when "100000000" => s5factor(2 downto 0) <= "111";
243
                        when "010000000" => s5factor(2 downto 0) <= "110";
244
                        when "001000000" => s5factor(2 downto 0) <= "101";
245
                        when "000100000" => s5factor(2 downto 0) <= "100";
246
                        when "000010000" => s5factor(2 downto 0) <= "011";
247
                        when "000001000" => s5factor(2 downto 0) <= "010";
248
                        when "000000100" => s5factor(2 downto 0) <= "001";
249
                        when "000000010" => s5factor(2 downto 0) <= "000";
250
                        when others => s5factor (2 downto 0) <= (others => s5result(24));
251
                end case;
252
 
253 118 jguarin200
        end process;
254 119 jguarin200
 
255
        --! Etapa 6: Ejecutar el corrimiento para normalizar la mantissa.
256 118 jguarin200
        normhighshiftermult:lpm_mult
257
        generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,18,27)
258 119 jguarin200
        port    map (s6factorhot9,s6result(24 downto 7),s6ph);
259 118 jguarin200
        normlowshiftermult:lpm_mult
260
        generic map ("DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9","UNSIGNED","LPM_MULT",9,9,18)
261 119 jguarin200
        port    map (s6factorhot9,s6result(06 downto 0)&"00",s6pl);
262
        s6postshift(22 downto 15) <= s6ph(16 downto 09);
263 120 jguarin200
        s6postshift(14 downto 06) <= s6ph(08 downto 00) + s6pl(17 downto 09);
264 119 jguarin200
        s6postshift(05 downto 00) <= s6pl(08 downto 03);
265 118 jguarin200
 
266
 
267
 
268
 
269
 
270 119 jguarin200
end fadd32_arch;
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272
 

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