OpenCores
URL https://opencores.org/ocsvn/raytrac/raytrac/trunk

Subversion Repositories raytrac

[/] [raytrac/] [branches/] [fp/] [fadd32.vhd] - Blame information for rev 189

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 118 jguarin200
------------------------------------------------
2 119 jguarin200
--! @file fadd32.vhd
3 118 jguarin200
--! @brief RayTrac Floating Point Adder  
4
--! @author Julián Andrés Guarín Reyes
5
--------------------------------------------------
6
 
7
 
8
-- RAYTRAC (FP BRANCH)
9
-- Author Julian Andres Guarin
10 119 jguarin200
-- fadd32.vhd
11 118 jguarin200
-- This file is part of raytrac.
12
-- 
13
--     raytrac is free software: you can redistribute it and/or modify
14
--     it under the terms of the GNU General Public License as published by
15
--     the Free Software Foundation, either version 3 of the License, or
16
--     (at your option) any later version.
17
-- 
18
--     raytrac is distributed in the hope that it will be useful,
19
--     but WITHOUT ANY WARRANTY; without even the implied warranty of
20
--     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21
--     GNU General Public License for more details.
22
-- 
23
--     You should have received a copy of the GNU General Public License
24
--     along with raytrac.  If not, see <http://www.gnu.org/licenses/>
25
library ieee;
26
use ieee.std_logic_1164.all;
27
use ieee.std_logic_unsigned.all;
28 155 jguarin200
 
29
use work.arithpack.all;
30
 
31 118 jguarin200
--! Esta entidad recibe dos n&uacutemeros en formato punto flotante IEEE 754, de precision simple y devuelve las mantissas signadas y corridas, y el exponente correspondiente al resultado antes de normalizarlo al formato float. 
32
--!\nLas 2 mantissas y el exponente entran despues a la entidad add2 que suma las mantissas y entrega el resultado en formato IEEE 754.
33 139 jguarin200
entity fadd32 is
34 150 jguarin200
 
35 118 jguarin200
        port (
36 150 jguarin200
                clk,dpc : in std_logic;
37 158 jguarin200
                a32,b32 : in xfloat32;
38
                c32             : out xfloat32
39 118 jguarin200
        );
40 153 jguarin200
end entity;
41 119 jguarin200
architecture fadd32_arch of fadd32 is
42 118 jguarin200
 
43
 
44 163 jguarin200
        --!TBXSTART:STAGE0
45
        signal s0delta  : std_logic_vector(7 downto 0);
46
        signal s0a,s0b  : std_logic_vector(31 downto 0); -- Float 32 bit 
47
 
48 152 jguarin200
        --!TBXEND
49 163 jguarin200
        --!TBXSTART:STAGE1
50
        signal s1zero                                                                                   : std_logic;
51
        signal s1delta                                                                                  : std_logic_vector(5 downto 0);
52
        signal s1exp                                                                                    : std_logic_vector(7 downto 0);
53
        signal s1shifter,s1datab_8x                                                             : std_logic_vector(8 downto 0);
54
        signal s1pl,s1datab                                                                             : std_logic_vector(17 downto 0);
55
        signal s1umantshift,s1umantfixed,s1postshift,s1xorslab  : std_logic_vector(23 downto 0);
56
        signal s1ph                                                                                             : std_logic_vector(26 downto 0);
57
        --!TBXEND
58
        --!TBXSTART:STAGE2
59
        signal s2exp                                            : std_logic_vector(7 downto 0);
60
        signal s2xorslab                                        : std_logic_vector(23 downto 0);
61
        signal s2umantshift, s2mantfixed        : std_logic_vector(24 downto 0);
62
        --!TBXEND
63
        --!TBXSTART:STAGE3
64
        signal s3exp                                    : std_logic_vector(7 downto 0);
65
        signal s3mantfixed,s3mantshift  : std_logic_vector (24 downto 0);
66
        --!TBXEND
67
        --!TBXSTART:STAGE4
68
        signal s4exp            : std_logic_vector (7 downto 0);
69
        signal s4xorslab        : std_logic_vector (24 downto 0);
70 170 jguarin200
        signal s4sresult        : std_logic_vector (25 downto 0);
71 163 jguarin200
        --!TBXEND
72
        --!TBXSTART:STAGE5
73 170 jguarin200
        signal s5exp            : std_logic_vector (7 downto 0);
74
        signal s5result         : std_logic_vector (25 downto 0);
75 163 jguarin200
        --!TBXEND
76 118 jguarin200
 
77 163 jguarin200
 
78
 
79
 
80
 
81 170 jguarin200
 
82 118 jguarin200
begin
83 150 jguarin200
 
84 139 jguarin200
        process (clk)
85 118 jguarin200
        begin
86 139 jguarin200
                if clk'event and clk='1'  then
87 118 jguarin200
 
88
                        --!Registro de entrada
89
                        s0a <= a32;
90
                        s0b(31) <= dpc xor b32(31);     --! Importante: Integrar el signo en el operando B
91
                        s0b(30 downto 0) <= b32(30 downto 0);
92
 
93
                        --!Etapa 0,Escoger el mayor exponente que sera el resultado desnormalizado, calcula cuanto debe ser el corrimiento de la mantissa con menor exponente y reorganiza los operandos, si el mayor es b, intercambia las posici&oacute;n si el mayor es a las posiciones la mantiene. Zero check.
94
                        --!signo,exponente,mantissa
95
                        if (s0b(30 downto 23)&s0a(30 downto 23))=x"0000" then
96
                                s1zero <= '0';
97
                        else
98
                                s1zero <= '1';
99
                        end if;
100 164 jguarin200
                        s1delta <= s0delta(7) & (s0delta(7) xor s0delta(4))&(s0delta(7) xor s0delta(3)) & s0delta(2 downto 0);
101 118 jguarin200
                        case s0delta(7) is
102
                                when '1'  =>
103
                                        s1exp <= s0b(30 downto 23);
104
                                        s1umantshift <= s0a(31)&s0a(22 downto 0);
105
                                        s1umantfixed <= s0b(31)&s0b(22 downto 0);
106
                                when others =>
107
                                        s1exp <= s0a(30 downto 23);
108
                                        s1umantshift <= s0b(31)&s0b(22 downto 0);
109
                                        s1umantfixed <= s0a(31)&s0a(22 downto 0);
110
                        end case;
111
 
112 164 jguarin200
                        --! Etapa 1: Denormalizaci&oacute;n de la mantissas.
113 118 jguarin200
                        case s1delta(4 downto 3) is
114
                                when "00" =>    s2umantshift <= s1umantshift(23)&s1postshift(23 downto 0);
115
                                when "01" =>    s2umantshift <= s1umantshift(23)&x"00"&s1postshift(23 downto 8);
116
                                when "10" =>    s2umantshift <= s1umantshift(23)&x"0000"&s1postshift(23 downto 16);
117
                                when others =>  s2umantshift <= (others => '0');
118
                        end case;
119 164 jguarin200
 
120
                        s2mantfixed <= s1umantfixed(23) & ( ( ('1'&s1umantfixed(22 downto 0)) xor s1xorslab) + ( x"00000"&"000"&s1umantfixed(23)  )   );
121 118 jguarin200
                        s2exp  <= s1exp;
122
 
123
                        --! Etapa2: Signar la mantissa denormalizada.
124
                        s3mantfixed <= s2mantfixed;
125
                        s3mantshift <= s2umantshift(24)&         (  (      s2umantshift(23 downto 0)  xor s2xorslab)   + ( x"00000"&"000"&s2umantshift(24)  )   );
126
                        s3exp           <= s2exp;
127
 
128 119 jguarin200
                        --! Etapa 3: Etapa 3 Realizar la suma, entre la mantissa corrida y la fija.
129 118 jguarin200
                        s4sresult       <= (s3mantshift(24)&s3mantshift)+(s3mantfixed(24)&s3mantfixed);
130
                        s4exp           <= s3exp;
131
 
132
                        --! Etapa 4: Quitar el signo a la mantissa resultante.
133
                        s5result        <= s4sresult(25)&((s4sresult(24 downto 0) xor s4xorslab)  +(x"000000"&s4sresult(25)));
134
                        s5exp           <= s4exp;
135
 
136
 
137
 
138 119 jguarin200
 
139 137 jguarin200
 
140 170 jguarin200
 
141 118 jguarin200
                end if;
142
        end process;
143 170 jguarin200
        --! Etapa 5: Codificar el corrimiento para la normalizacion de la mantissa resultante y entregar el resultado.
144
        c32(31) <= s5result(25);
145
        process (s5result(24 downto 0))
146
        begin
147
                case s5result(24) is
148
                        when '1' =>
149
                                c32 (22 downto 00) <= s5result(23 downto 1);
150
                                c32 (30 downto 23) <= s5exp+1;
151
                        when others =>
152
                                c32 (22 downto 00) <= s5result(22 downto 0);
153
                                c32 (30 downto 23) <= s5exp;
154
                end case;
155
        end process;
156
 
157 137 jguarin200
 
158 118 jguarin200
        --! Combinatorial gremlin, Etapa 0 el corrimiento de la mantissa con menor exponente y reorganiza los operandos,\n
159
        --! si el mayor es b, intercambia las posici&oacute;n si el mayor es a las posiciones la mantiene. 
160
        s0delta <=  s0a(30 downto 23)-s0b(30 downto 23);
161
        --! Combinatorial Gremlin, Etapa 1 Codificar el factor de corrimiento de denormalizacion y denormalizar la mantissa no fija. Signar la mantissa que se queda fija.
162
        decodeshiftfactor:
163
        process (s1delta(2 downto 0))
164
        begin
165
                case s1delta(2 downto 0) is
166
                        when "111" =>  s1shifter(8 downto 0) <= '0'&s1delta(5)&"00000"&not(s1delta(5))&'0';
167
                        when "110" =>  s1shifter(8 downto 0) <= "00"&s1delta(5)&"000"&not(s1delta(5))&"00";
168
                        when "101" =>  s1shifter(8 downto 0) <= "000"&s1delta(5)&'0'&not(s1delta(5))&"000";
169
                        when "100" =>  s1shifter(8 downto 0) <= '0'&x"10";
170
                        when "011" =>  s1shifter(8 downto 0) <= "000"&not(s1delta(5))&'0'&s1delta(5)&"000";
171
                        when "010" =>  s1shifter(8 downto 0) <= "00"&not(s1delta(5))&"000"&s1delta(5)&"00";
172
                        when "001" =>  s1shifter(8 downto 0) <= '0'&not(s1delta(5))&"00000"&s1delta(5)&'0';
173
                        when others => s1shifter(8 downto 0) <=    not(s1delta(5))&"0000000"&s1delta(5);
174
                end case;
175
        end process;
176 157 jguarin200
        s1datab <= s1zero&s1umantshift(22 downto 06);
177 118 jguarin200
        denormhighshiftermult:lpm_mult
178 155 jguarin200
        generic map (
179
                lpm_hint => "DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9",
180
                lpm_pipeline => 0,
181
                lpm_representation => "UNSIGNED",
182
                lpm_type => "LPM_MULT",
183
                lpm_widtha => 9,
184
                lpm_widthb => 18,
185
                lpm_widthp => 27
186
        )
187
        port map (
188
                dataa => s1shifter,
189 157 jguarin200
                datab => s1datab,
190 155 jguarin200
                result => s1ph
191
        );
192 157 jguarin200
        s1datab_8x <= s1umantshift(5 downto 0)&"000";
193 118 jguarin200
        denormlowshiftermult:lpm_mult
194 155 jguarin200
        generic map (
195
                lpm_hint => "DEDICATED_MULTIPLIER_CIRCUITRY=YES,MAXIMIZE_SPEED=9",
196
                lpm_pipeline => 0,
197
                lpm_representation => "UNSIGNED",
198
                lpm_type => "LPM_MULT",
199
                lpm_widtha => 9,
200
                lpm_widthb => 9,
201
                lpm_widthp => 18
202
        )
203
        port map (
204
                dataa => s1shifter,
205 157 jguarin200
                datab(8 downto 0) => s1datab_8x,
206 155 jguarin200
                result => s1pl
207
        );
208 118 jguarin200
 
209
        s1postshift(23 downto 7) <= s1ph(25 downto 9);
210
        s1postshift(06 downto 0) <= s1ph(08 downto 2) or s1pl(17 downto 11);
211
        s1xorslab(23 downto 0) <= (others => s1umantfixed(23));
212
 
213
        --! Combinatorial Gremlin, Etapa 2: Signar la mantissa denormalizada. 
214
        s2xorslab <= (others => s2umantshift(24));
215
 
216
        --! Combinatorial Gremlin, Etapa 4: Quitar el signo de la mantissa resultante.
217
        s4xorslab <= (others => s4sresult(25));
218
 
219 119 jguarin200
 
220 118 jguarin200
 
221
 
222
 
223
 
224
 
225 153 jguarin200
end architecture;
226 118 jguarin200
 
227
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.