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[/] [raytrac/] [branches/] [fp/] [im.vhd] - Blame information for rev 181

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1 147 jguarin200
--! @file im.vhd
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--! @brief Maquina de Interrupciones. Circuito que detecta eventos que generan interrupciones para que el usuario externo del RayTrac detecte eventos como el final de una instrucción.  
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--! @author Julián Andrés Guarín Reyes
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--------------------------------------------------------------
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-- RAYTRAC
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-- Author Julian Andres Guarin
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-- sm.vhd
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-- This file is part of raytrac.
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-- 
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--     raytrac is free software: you can redistribute it and/or modify
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--     it under the terms of the GNU General Public License as published by
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--     the Free Software Foundation, either version 3 of the License, or
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--     (at your option) any later version.
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-- 
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--     raytrac is distributed in the hope that it will be useful,
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--     but WITHOUT ANY WARRANTY; without even the implied warranty of
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--     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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--     GNU General Public License for more details.
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-- 
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--     You should have received a copy of the GNU General Public License
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--     along with raytrac.  If not, see <http://www.gnu.org/licenses/>.
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--! 
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use work.arithpack.all;
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entity im is
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        generic (
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                num_events : integer :=4;
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                cycles_to_wait : integer := 1023
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        );
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        port (
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                clk,rst:                in std_logic;
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                rfull_event:    in std_logic;
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                eoi_event:              in std_logic;   --! end of instruction related events
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                int:                    out std_logic;  --! interruption
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                state:                  out iCtrlState
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        );
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end entity;
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architecture im_arch of im is
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        signal s_state : iCtrlState;
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begin
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        state <= s_state;
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        --! Existen 2 estados para disparar la se&ntilde;al de interrupci&oacute;n : WAITING_FOR_A_RFULL_EVENT y INHIBIT_RFULL_INT. Siempre que haya el final de una instrucci&oacute;n en cualquiera de los dos estados se notificar&aacute; el evento sin importar el estado en que se encuentre la m&aacute;quina.
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        --! Si cualquiera de las se&ntilde;ales de cola llena se encuentra activa, el evento ser&aacute; notificado en el estado WAITING_FOR_A_RFULL_EVENT, inmediatamente se cambia al estado INHIBIT_RFULL_INT, donde durante un n&uacte;mero de ciclos (parametrizado) se ignora la se&ntilde;al de full de las colas de resultados.
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        --! Despues que han transcurrido los ciclos mencionados, se vuelve al estado WAITING_FOR_A_RFULL_EVENT.
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        sm_proc:
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        process (clk,rst)
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                variable tempo : integer range 0 to cycles_to_wait:=cycles_to_wait;
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        begin
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                if rst=rstMasterValue then
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                        tempo := cycles_to_wait;
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                        int <= '0';
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                elsif clk'event and clk='1' then
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                        case s_state is
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                                when WAITING_FOR_A_RFULL_EVENT =>
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                                        int <= rfull_event or eoi_event;
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                                        if rfull_event='1' then
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                                                s_state <= INHIBIT_RFULL_INT;
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                                        end if;
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                                when INHIBIT_RFULL_INT =>
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                                        int <= eoi_event;
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                                        if tempo=0 then
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                                                s_state <= WAITING_FOR_A_RFULL_EVENT;
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                                                tempo := cycles_to_wait;
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                                        else
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                                                tempo:=tempo-1;
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                                        end if;
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                                when others => null;
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                        end case;
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                end if;
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        end process;
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end architecture;
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