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--! @file dpc.vhd
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--! @brief Decodificador de operacion.
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--! @author Julián Andrés Guarín Reyes
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--------------------------------------------------------------
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-- RAYTRAC
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-- Author Julian Andres Guarin
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-- dpc.vhd
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-- This file is part of raytrac.
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--
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-- raytrac is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- raytrac is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with raytrac. If not, see <http://www.gnu.org/licenses/>.
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library ieee;
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use ieee.std_logic_1164.all;
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entity dpc is
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generic (
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width : integer := 32
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--!external_readable_widthad : integer := integer(ceil(log(real(external_readable_blocks),2.0))))
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);
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port (
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clk,rst : in std_logic;
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paraminput : in std_logic_vector ((12*width)-1 downto 0); --! Vectores A,B,C,D
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prd32blko : in std_logic_vector ((06*width)-1 downto 0); --! Salidas de los 6 multiplicadores.
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add32blko : in std_logic_vector ((04*width)-1 downto 0); --! Salidas de los 4 sumadores.
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sqr32blko,inv32blko : in std_logic_vector (width-1 downto 0); --! Salidas de la raiz cuadradas y el inversor.
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fifo32x23_q : in std_logic_vector (03*width-1 downto 0); --! Salida de la cola intermedia.
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fifo32x09_q : in std_logic_vector (02*width-1 downto 0); --! Salida de las colas de producto punto.
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unary,crossprod,addsub : in std_logic; --! Bit con el identificador del bloque AB vs CD e identificador del sub bloque (A/B) o (C/D).
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sync_chain_d : in std_logic; --! Señal de dato valido que se va por toda la cadena de sincronizacion.
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sqr32blki,inv32blki : out std_logic_vector (width-1 downto 0); --! Salidas de las 2 raices cuadradas y los 2 inversores.
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fifo32x26_d : out std_logic_vector (03*width-1 downto 0); --! Entrada a la cola intermedia para la normalización.
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fifo32x09_d : out std_logic_vector (02*width-1 downto 0); --! Entrada a las colas intermedias del producto punto.
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prd32blki : out std_logic_vector ((12*width)-1 downto 0); --! Entrada de los 12 factores en el bloque de multiplicación respectivamente.
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add32blki : out std_logic_vector ((08*width)-1 downto 0); --! Entrada de los 8 sumandos del bloque de 4 sumadores.
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res567w,res13w,res2w : out std_logic; --! Salidas de escritura y lectura en las colas de resultados.
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res0w,res4w,fifo32x09_w : out std_logic;
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fifo32x23_w,fifo32x09_r : out std_logic;
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fifo32x23_r : out std_logic;
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res567f,res13f : in std_logic; --! Entradas de la señal de full de las colas de resultados.
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res2f,res0f : in std_logic;
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resf : out std_logic; --! Salida decodificada que indica que la cola de resultados de la operación está en curso.
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resultoutput : out std_logic_vector ((08*width)-1 downto 0) --! 8 salidas de resultados, pues lo máximo que podrá calcularse por cada clock son 2 vectores.
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);
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end dpc;
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architecture dpc_arch of dpc is
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constant qz : integer := 00;constant qy : integer := 01;constant qx : integer := 02;
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constant az : integer := 00;constant ay : integer := 01;constant ax : integer := 02;constant bz : integer := 03;constant by : integer := 04;constant bx : integer := 05;
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constant cz : integer := 06;constant cy : integer := 07;constant cx : integer := 08;constant dz : integer := 09;constant dy : integer := 10;constant dx : integer := 11;
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constant f0 : integer := 00;constant f1 : integer := 01;constant f2 : integer := 02;constant f3 : integer := 03;constant f4 : integer := 04;constant f5 : integer := 05;
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constant f6 : integer := 06;constant f7 : integer := 07;constant f8 : integer := 08;constant f9 : integer := 09;constant f10: integer := 10;constant f11: integer := 11;
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constant s0 : integer := 00;constant s1 : integer := 01;constant s2 : integer := 02;constant s3 : integer := 03;constant s4 : integer := 04;constant s5 : integer := 05;
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constant s6 : integer := 06;constant s7 : integer := 07;
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constant a0 : integer := 00;constant a1 : integer := 01;constant a2 : integer := 02;constant aa : integer := 03;
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constant p0 : integer := 00;constant p1 : integer := 01;constant p2 : integer := 02;constant p3 : integer := 03;constant p4 : integer := 04;constant p5 : integer := 05;
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constant dpfifoab : integer := 00;
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constant dpfifocd : integer := 01;
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type vectorblock12 is array (11 downto 0) of std_logic_vector(width-1 downto 0);
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type vectorblock08 is array (07 downto 0) of std_logic_vector(width-1 downto 0);
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type vectorblock06 is array (05 downto 0) of std_logic_vector(width-1 downto 0);
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type vectorblock04 is array (03 downto 0) of std_logic_vector(width-1 downto 0);
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type vectorblock03 is array (02 downto 0) of std_logic_vector(width-1 downto 0);
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type vectorblock02 is array (01 downto 0) of std_logic_vector(width-1 downto 0);
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signal sparaminput,sfactor : vectorblock12;
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signal ssumando,sresult : vectorblock08;
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signal sprd32blk : vectorblock06;
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signal sadd32blk : vectorblock04;
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signal snormfifo_q,snormfifo_d : vectorblock03;
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signal sdpfifo_q : vectorblock02;
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signal ssqr32blk,sinv32blk : std_logic_vector(width-1 downto 0);
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signal ssync_chain : std_logic_vector(28 downto 0);
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signal ssync_chain_d : std_logic;
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constant rstMasterValue : std_logic := '0';
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begin
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--! Cadena de sincronización: 29 posiciones.
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ssync_chain_d <= sync_chain_d;
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sync_chain_proc:
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process(clk,rst)
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begin
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if rst=rstMasterValue then
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ssync_chain <= (others => '0');
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elsif clk'event and clk='1' then
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ssync_chain(0) <= ssync_chain_d;
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for i in 28 downto 1 loop
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ssync_chain(i) <= ssync_chain(i-1);
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end loop;
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end if;
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end process sync_chain_proc;
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--! Escritura en las colas de resultados y escritura/lectura en las colas intermedias mediante cadena de resultados.
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fifo32x09_w <= ssync_chain(5);
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fifo32x23_w <= ssync_chain(1);
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fifo32x09_r <= ssync_chain(13);
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fifo32x23_r <= ssync_chain(24);
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res0w <= ssync_chain(23);
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res4w <= ssync_chain(21);
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sync_chain_comb:
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process (ssync_chain,addsub,crossprod,unary)
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begin
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if unary='1' then
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res567w <= ssync_chain(28);
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else
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res567w <= ssync_chain(4);
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end if;
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if addsub='1' then
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res13w <= ssync_chain(9);
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res2w <= ssync_chain(9);
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else
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res13w <= ssync_chain(13);
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if crossprod='1' then
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res2w <= ssync_chain(13);
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else
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res2w <= ssync_chain(22);
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end if;
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end if;
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end process sync_chain_comb;
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--! El siguiente código sirve para conectar arreglos a señales std_logic_1164, simplemente son abstracciones a nivel de código y no representará cambios en la síntesis.
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stuff12:
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for i in 11 downto 0 generate
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sparaminput(i) <= paraminput(i*width+width-1 downto i*width);
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prd32blki(i*width+width-1 downto i*width) <= sfactor(i);
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end generate stuff12;
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stuff08:
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for i in 07 downto 0 generate
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add32blki(i*width+width-1 downto i*width) <= ssumando(i);
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resultoutput(i*width+width-1 downto i*width) <= sresult(i);
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end generate stuff08;
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stuff04:
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for i in 03 downto 1 generate
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sadd32blk(i) <= add32blko(i*width+width-1 downto i*width);
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end generate stuff04;
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stuff03:
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for i in 02 downto 0 generate
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snormfifo_q(i) <= fifo32x23_q(i*width+width-1 downto i*width);
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fifo32x26_d(i*width+width-1 downto i*width) <= snormfifo_d(i);
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end generate stuff03;
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stuff02:
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for i in 01 downto 0 generate
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sdpfifo_q(i) <= fifo32x09_q(i*width+width-1 downto i*width);
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end generate stuff02;
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--! El siguiente código sirve para conectar arreglos a señales std_logic_1164, son abstracciones de código también, sin embargo se realizan a través de registros.
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register_products_outputs:
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process (clk)
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begin
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if clk'event and clk='1' then
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for i in 05 downto 0 loop
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sprd32blk(i) <= prd32blko(i*width+width-1 downto i*width);
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end loop;
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end if;
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end process;
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--! Los productos del multiplicador 2 y 3, ya registrados dentro de dpc van a la cola intermedia del producto punto (fifo32x09_d)
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fifo32x09_d <= sprd32blk(p3)&sprd32blk(p2);
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register_adder0_and_inversor_output:
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process (clk)
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begin
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if clk'event and clk='1' then
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sadd32blk(a0) <= add32blko(a0*width+width-1 downto a0*width);
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sinv32blk <= inv32blko;
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end if;
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end process;
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ssqr32blk <= sqr32blko;
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--! Colas de salida de los distintos resultados;
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sresult(0) <= ssqr32blk;
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sresult(1) <= sadd32blk(a0);
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sresult(2) <= sadd32blk(a1);
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sresult(3) <= sadd32blk(a2);
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sresult(4) <= sadd32blk(aa);
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sresult(5) <= sprd32blk(p3);
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sresult(6) <= sprd32blk(p4);
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sresult(7) <= sprd32blk(p5);
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--! Cola de normalizacion
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snormfifo_d(qx) <= sparaminput(ax);
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snormfifo_d(qy) <= sparaminput(ay);
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snormfifo_d(qz) <= sparaminput(az);
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jguarin200 |
--! La entrada al inversor SIEMPRE viene con la salida de la raiz cuadrada
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inv32blki <= sqr32blko;
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jguarin200 |
--! La entrada de la ra�z cuadrada SIEMPRE viene con la salida del sumador 1.
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jguarin200 |
sqr32blki <= sadd32blk(a1);
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jguarin200 |
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jguarin200 |
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--! Conectar las entradas del sumador a, a la salida
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ssumando(s6) <= sadd32blk(a2);
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ssumando(s7) <= sdpfifo_q(dpfifocd);
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jguarin200 |
fullQ:process(res0f,res13f,res2f,res567f,unary,crossprod,addsub)
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begin
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if unary='0' then
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if crossprod='1' or addsub='1' then
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resf <= res13f;
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else
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resf <= res2f;
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end if;
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elsif crossprod='1' or addsub='1' then
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resf <= res567f;
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else
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resf <= res0f;
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end if;
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end process;
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jguarin200 |
mul:process(unary,addsub,crossprod,sparaminput,sinv32blk,sprd32blk,sadd32blk,sdpfifo_q,snormfifo_q)
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jguarin200 |
begin
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jguarin200 |
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jguarin200 |
sfactor(f4) <= sparaminput(az);
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jguarin200 |
if unary='1' then
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--! Magnitud y normalizacion
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sfactor(f0) <= sparaminput(ax);
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sfactor(f1) <= sparaminput(ax);
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sfactor(f2) <= sparaminput(ay);
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sfactor(f3) <= sparaminput(ay);
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jguarin200 |
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jguarin200 |
sfactor(f5) <= sparaminput(az);
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jguarin200 |
if crossprod='1' and addsub='1' then
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sfactor(f6) <= sparaminput(cx);
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sfactor(f7) <= sparaminput(dx);
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sfactor(f8) <= sparaminput(cy);
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sfactor(f9) <= sparaminput(dx);
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sfactor(f10) <= sparaminput(cz);
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sfactor(f11) <= sparaminput(dx);
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else
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sfactor(f6) <= snormfifo_q(ax);
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sfactor(f7) <= sinv32blk;
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sfactor(f8) <= snormfifo_q(ay);
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sfactor(f9) <= sinv32blk;
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sfactor(f10) <= snormfifo_q(az);
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sfactor(f11) <= sinv32blk;
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end if;
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| 270 |
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|
elsif addsub='0' then
|
| 271 |
|
|
--! Solo productos punto o cruz
|
| 272 |
|
|
if crossprod='1' then
|
| 273 |
|
|
|
| 274 |
|
|
sfactor(f0) <= sparaminput(ay);
|
| 275 |
|
|
sfactor(f1) <= sparaminput(bz);
|
| 276 |
|
|
sfactor(f2) <= sparaminput(az);
|
| 277 |
|
|
sfactor(f3) <= sparaminput(by);
|
| 278 |
|
|
|
| 279 |
|
|
sfactor(f5) <= sparaminput(bx);
|
| 280 |
|
|
sfactor(f6) <= sparaminput(ax);
|
| 281 |
|
|
sfactor(f7) <= sparaminput(bz);
|
| 282 |
|
|
sfactor(f8) <= sparaminput(ax);
|
| 283 |
|
|
sfactor(f9) <= sparaminput(by);
|
| 284 |
|
|
sfactor(f10) <= sparaminput(ay);
|
| 285 |
|
|
sfactor(f11) <= sparaminput(bx);
|
| 286 |
|
|
|
| 287 |
|
|
else
|
| 288 |
|
|
|
| 289 |
|
|
sfactor(f0) <= sparaminput(ax) ;
|
| 290 |
|
|
sfactor(f1) <= sparaminput(bx) ;
|
| 291 |
|
|
sfactor(f2) <= sparaminput(ay) ;
|
| 292 |
|
|
sfactor(f3) <= sparaminput(by) ;
|
| 293 |
|
|
sfactor(f5) <= sparaminput(bz) ;
|
| 294 |
|
|
sfactor(f6) <= sparaminput(cx) ;
|
| 295 |
|
|
sfactor(f7) <= sparaminput(dx) ;
|
| 296 |
|
|
sfactor(f8) <= sparaminput(cy) ;
|
| 297 |
|
|
sfactor(f9) <= sparaminput(dy) ;
|
| 298 |
|
|
sfactor(f10) <= sparaminput(cz) ;
|
| 299 |
|
|
sfactor(f11) <= sparaminput(dz) ;
|
| 300 |
|
|
end if;
|
| 301 |
|
|
|
| 302 |
127 |
jguarin200 |
else
|
| 303 |
|
|
sfactor(f0) <= sparaminput(ax) ;
|
| 304 |
|
|
sfactor(f1) <= sparaminput(bx) ;
|
| 305 |
|
|
sfactor(f2) <= sparaminput(ay) ;
|
| 306 |
|
|
sfactor(f3) <= sparaminput(by) ;
|
| 307 |
|
|
sfactor(f5) <= sparaminput(bz) ;
|
| 308 |
|
|
sfactor(f6) <= sparaminput(cx) ;
|
| 309 |
|
|
sfactor(f7) <= sparaminput(dx) ;
|
| 310 |
|
|
sfactor(f8) <= sparaminput(cy) ;
|
| 311 |
|
|
sfactor(f9) <= sparaminput(dx) ;
|
| 312 |
|
|
sfactor(f10) <= sparaminput(cz) ;
|
| 313 |
|
|
sfactor(f11) <= sparaminput(dx) ;
|
| 314 |
125 |
jguarin200 |
end if;
|
| 315 |
127 |
jguarin200 |
|
| 316 |
136 |
jguarin200 |
|
| 317 |
127 |
jguarin200 |
if addsub='1' then
|
| 318 |
|
|
ssumando(s0) <= sparaminput(ax);
|
| 319 |
|
|
ssumando(s1) <= sparaminput(bx);
|
| 320 |
|
|
ssumando(s2) <= sparaminput(ay);
|
| 321 |
|
|
ssumando(s3) <= sparaminput(by);
|
| 322 |
|
|
ssumando(s4) <= sparaminput(az);
|
| 323 |
|
|
ssumando(s5) <= sparaminput(bz);
|
| 324 |
|
|
else
|
| 325 |
|
|
ssumando(s0) <= sprd32blk(p0);
|
| 326 |
|
|
ssumando(s1) <= sprd32blk(p1);
|
| 327 |
132 |
jguarin200 |
if crossprod='0' then
|
| 328 |
|
|
ssumando(s2) <= sadd32blk(a0);
|
| 329 |
|
|
ssumando(s3) <= sdpfifo_q(dpfifoab);
|
| 330 |
|
|
else
|
| 331 |
|
|
ssumando(s2) <= sprd32blk(p2);
|
| 332 |
|
|
ssumando(s3) <= sprd32blk(p3);
|
| 333 |
|
|
end if;
|
| 334 |
127 |
jguarin200 |
ssumando(s4) <= sprd32blk(p4);
|
| 335 |
|
|
ssumando(s5) <= sprd32blk(p5);
|
| 336 |
|
|
end if;
|
| 337 |
123 |
jguarin200 |
end process;
|
| 338 |
|
|
|
| 339 |
|
|
|
| 340 |
127 |
jguarin200 |
|
| 341 |
|
|
|
| 342 |
|
|
-- interconnection:process(instr3,hblockslab,abblockslab,cdblockslab,sparaminput,sprd32blk,sadd32blk,sdpfifo_q)
|
| 343 |
|
|
-- begin
|
| 344 |
|
|
-- --! La cola para la normalizacion de los vectores.
|
| 345 |
|
|
-- snormfifo_d(qx) <= (hblockslab and ((cdblockslab and sparaminput(dx))or(not(cdblockslab) and sparaminput(cx)))) or (not(hblockslab) and ((abblockslab and sparaminput(bx))or(not(abblockslab) and sparaminput(ax))));
|
| 346 |
|
|
-- snormfifo_d(qy) <= (hblockslab and ((cdblockslab and sparaminput(dy))or(not(cdblockslab) and sparaminput(cy)))) or (not(hblockslab) and ((abblockslab and sparaminput(by))or(not(abblockslab) and sparaminput(ay))));
|
| 347 |
|
|
-- snormfifo_d(qz) <= (hblockslab and ((cdblockslab and sparaminput(dz))or(not(cdblockslab) and sparaminput(cz)))) or (not(hblockslab) and ((abblockslab and sparaminput(bz))or(not(abblockslab) and sparaminput(az))));
|
| 348 |
|
|
--
|
| 349 |
|
|
-- --! Combinatorio para decidir que operaciones realizan los sumadores / restadores.
|
| 350 |
|
|
-- add32blks <= (instr3(0) xor (instr3(1) xor instr3(0)))&(instr3(0) xor (instr3(1) xor instr3(0))) ;
|
| 351 |
|
|
--
|
| 352 |
|
|
-- --! Por defecto conectar los sumandos en producto punto/cruz
|
| 353 |
|
|
-- ssumando(s0) <= sprd32blk(p0);ssumando(s1) <= sprd32blk(p1);
|
| 354 |
|
|
-- ssumando(s6) <= sadd32blk(a0);ssumando(s7) <= sdpfifo_q(dpfifoab);
|
| 355 |
|
|
-- ssumando(s10) <= sdpfifo_q(dpfifocd);ssumando(s11) <= sadd32blk(a2);
|
| 356 |
|
|
-- ssumando(s4) <= sprd32blk(p4);ssumando(s5) <= sprd32blk(p5);
|
| 357 |
|
|
-- ssumando(s2) <= sprd32blk(p2);ssumando(s3) <= sprd32blk(p3);
|
| 358 |
|
|
--
|
| 359 |
|
|
-- --! El segundo sumador del segundo bloque siempre sera suma o resta independiente de la operacion
|
| 360 |
|
|
-- ssumando(s8) <= sparaminput(cy);ssumando(s9) <= sparaminput(dy);
|
| 361 |
|
|
--
|
| 362 |
|
|
-- --! Por defecto conectar los factores en producto punto
|
| 363 |
|
|
-- sfactor(f0) <= sparaminput(ax);sfactor(f1) <= sparaminput(bx);
|
| 364 |
|
|
-- sfactor(f2) <= sparaminput(ay);sfactor(f3) <= sparaminput(by);
|
| 365 |
|
|
-- sfactor(f4) <= sparaminput(az);sfactor(f5) <= sparaminput(bz);
|
| 366 |
|
|
-- sfactor(f6) <= sparaminput(bx);sfactor(f7) <= sparaminput(dx);
|
| 367 |
|
|
-- sfactor(f8) <= sparaminput(by);sfactor(f9) <= sparaminput(dy);
|
| 368 |
|
|
-- sfactor(f10) <= sparaminput(bz);sfactor(f11) <= sparaminput(dz);
|
| 369 |
|
|
--
|
| 370 |
|
|
-- --!Los resultados por defecto se acomodan al producto punto y parcialmente a los productos simple y escalar.
|
| 371 |
|
|
-- sresult(ax) <= sadd32blk(aa);
|
| 372 |
|
|
-- sresult(ay) <= sprd32blk(p1);
|
| 373 |
|
|
-- sresult(az) <= sprd32blk(p2);
|
| 374 |
|
|
-- sresult(bx) <= sadd32blk(ac);
|
| 375 |
|
|
-- sresult(by) <= sprd32blk(p4);
|
| 376 |
|
|
-- sresult(bz) <= sprd32blk(p5);
|
| 377 |
|
|
--
|
| 378 |
|
|
-- if (instr3(2 downto 1)="11" or instr3="100") then
|
| 379 |
|
|
-- sresult(ax) <= sprd32blk(p0);
|
| 380 |
|
|
-- sresult(bx) <= sprd32blk(p3);
|
| 381 |
|
|
-- elsif instr3(0)='1' then
|
| 382 |
|
|
-- sresult(ax) <= sprd32blk(a0);
|
| 383 |
|
|
-- sresult(ay) <= sprd32blk(a1);
|
| 384 |
|
|
-- sresult(az) <= sprd32blk(a2);
|
| 385 |
|
|
-- sresult(bx) <= sadd32blk(aa);
|
| 386 |
|
|
-- sresult(by) <= sprd32blk(ab);
|
| 387 |
|
|
-- sresult(bz) <= sadd32blk(ac);
|
| 388 |
|
|
-- elsif instr3(1)='1' then
|
| 389 |
|
|
-- sresult(ax) <= ssqr32blk(sqrt320);
|
| 390 |
|
|
-- sresult(bx) <= ssqr32blk(sqrt321);
|
| 391 |
|
|
-- end if;
|
| 392 |
|
|
--
|
| 393 |
|
|
--
|
| 394 |
|
|
-- if instr3(0)='1' then --! Producto Cruz, suma, resta, multiplicacion simple
|
| 395 |
|
|
--
|
| 396 |
|
|
-- if (instr3(2) or instr3(1))='1' then --! Suma, Resta, Multiplicacion simple
|
| 397 |
|
|
--
|
| 398 |
|
|
-- --! Conectar las entradas de los sumadores en suma o resta de vectores
|
| 399 |
|
|
-- ssumando(s0) <= sparaminput(ax);ssumando(s1) <= sparaminput(bx);
|
| 400 |
|
|
-- ssumando(s2) <= sparaminput(ay);ssumando(s3) <= sparaminput(by);
|
| 401 |
|
|
-- ssumando(s4) <= sparaminput(az);ssumando(s5) <= sparaminput(bz);
|
| 402 |
|
|
-- ssumando(s6) <= sparaminput(cx);ssumando(s7) <= sparaminput(dx);
|
| 403 |
|
|
-- ssumando(s10) <= sparaminput(cz);ssumando(s11) <= sparaminput(dz);
|
| 404 |
|
|
--
|
| 405 |
|
|
-- else --! Producto Cruz!
|
| 406 |
|
|
--
|
| 407 |
|
|
-- if hblock='1' then --! Producto crux CxD
|
| 408 |
|
|
-- --!Multiplicadores:
|
| 409 |
|
|
-- sfactor(f0) <= sparaminput(cy);sfactor(f1) <= sparaminput(dz);sfactor(f2) <= sparaminput(cz);sfactor(f3) <= sparaminput(dy);
|
| 410 |
|
|
-- sfactor(f4) <= sparaminput(cx);sfactor(f5) <= sparaminput(dz);sfactor(f6) <= sparaminput(cz);sfactor(f7) <= sparaminput(dx);
|
| 411 |
|
|
-- sfactor(f8) <= sparaminput(cx);sfactor(f9) <= sparaminput(dy);sfactor(f10) <= sparaminput(cy);sfactor(f11) <= sparaminput(dx);
|
| 412 |
|
|
-- else --! Producto crux AxD
|
| 413 |
|
|
-- --!Multiplicadores:
|
| 414 |
|
|
-- sfactor(f0) <= sparaminput(ay);sfactor(f1) <= sparaminput(bz);sfactor(f2) <= sparaminput(az);sfactor(f3) <= sparaminput(by);
|
| 415 |
|
|
-- sfactor(f4) <= sparaminput(ax);sfactor(f5) <= sparaminput(bz);sfactor(f6) <= sparaminput(az);sfactor(f7) <= sparaminput(bx);
|
| 416 |
|
|
-- sfactor(f8) <= sparaminput(ax);sfactor(f9) <= sparaminput(by);sfactor(f10) <= sparaminput(ay);sfactor(f11) <= sparaminput(bx);
|
| 417 |
|
|
-- end if;
|
| 418 |
|
|
--
|
| 419 |
|
|
-- end if;
|
| 420 |
|
|
--
|
| 421 |
|
|
-- else --! Producto Punto, magnitud, producto escalar y normalizacion
|
| 422 |
|
|
-- if instr3(2)='1' then --!Producto Escalar (INSTR3(1)=0) o Normalizacion (INSTR3(1)=1)
|
| 423 |
|
|
--
|
| 424 |
|
|
-- sfactor(f0) <= (not instr31slab and sparaminput(ax)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(ax)) or(abblockslab and sparaminput(bx))))or( hblockslab and snormfifo_q(qx)) ) );
|
| 425 |
|
|
-- sfactor(f1) <= (not instr31slab and sparaminput(bx)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(ax)) or(abblockslab and sparaminput(bx))))or( hblockslab and sinv32blk(invr321)) ) );
|
| 426 |
|
|
-- sfactor(f2) <= (not instr31slab and sparaminput(ay)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(ay)) or(abblockslab and sparaminput(by))))or( hblockslab and snormfifo_q(qy)) ) );
|
| 427 |
|
|
-- sfactor(f3) <= (not instr31slab and sparaminput(bx)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(ay)) or(abblockslab and sparaminput(by))))or( hblockslab and sinv32blk(invr321)) ) );
|
| 428 |
|
|
-- sfactor(f4) <= (not instr31slab and sparaminput(az)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(az)) or(abblockslab and sparaminput(bz))))or( hblockslab and snormfifo_q(qz)) ) );
|
| 429 |
|
|
-- sfactor(f5) <= (not instr31slab and sparaminput(bx)) or (instr31slab and ((not(hblockslab) and ((not(abblockslab) and sparaminput(az)) or(abblockslab and sparaminput(bz))))or( hblockslab and sinv32blk(invr321)) ) );
|
| 430 |
|
|
-- sfactor(f6) <= (not instr31slab and sparaminput(cx)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cx)) or(cdblockslab and sparaminput(dx))))or( not(hblockslab) and snormfifo_q(qx)) ) );
|
| 431 |
|
|
-- sfactor(f7) <= (not instr31slab and sparaminput(dx)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cx)) or(cdblockslab and sparaminput(dx))))or( not(hblockslab) and sinv32blk(invr320)) ) );
|
| 432 |
|
|
-- sfactor(f8) <= (not instr31slab and sparaminput(cy)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cy)) or(cdblockslab and sparaminput(dy))))or( not(hblockslab) and snormfifo_q(qy)) ) );
|
| 433 |
|
|
-- sfactor(f9) <= (not instr31slab and sparaminput(dx)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cy)) or(cdblockslab and sparaminput(dy))))or( not(hblockslab) and sinv32blk(invr320)) ) );
|
| 434 |
|
|
-- sfactor(f10) <= (not instr31slab and sparaminput(cz)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cz)) or(cdblockslab and sparaminput(dz))))or( not(hblockslab) and snormfifo_q(qz)) ) );
|
| 435 |
|
|
-- sfactor(f11) <= (not instr31slab and sparaminput(dx)) or (instr31slab and ((hblockslab and ((not(cdblockslab) and sparaminput(cz)) or(cdblockslab and sparaminput(dz))))or( not(hblockslab) and sinv32blk(invr320)) ) );
|
| 436 |
|
|
-- elsif instr3(1)='1' then --!Magnitud. El producto punto no se computa porque los factores estan por defecto configurados en producto punto.
|
| 437 |
|
|
-- sfactor(f0) <= (not(abblockslab) and sparaminput(ax))or(abblockslab and sparaminput(bx));
|
| 438 |
|
|
-- sfactor(f1) <= (not(abblockslab) and sparaminput(ax))or(abblockslab and sparaminput(bx));
|
| 439 |
|
|
-- sfactor(f2) <= (not(abblockslab) and sparaminput(ay))or(abblockslab and sparaminput(by));
|
| 440 |
|
|
-- sfactor(f3) <= (not(abblockslab) and sparaminput(ay))or(abblockslab and sparaminput(by));
|
| 441 |
|
|
-- sfactor(f4) <= (not(abblockslab) and sparaminput(az))or(abblockslab and sparaminput(bz));
|
| 442 |
|
|
-- sfactor(f5) <= (not(abblockslab) and sparaminput(az))or(abblockslab and sparaminput(bz));
|
| 443 |
|
|
-- sfactor(f6) <= (not(cdblockslab) and sparaminput(cx))or(cdblockslab and sparaminput(dx));
|
| 444 |
|
|
-- sfactor(f7) <= (not(cdblockslab) and sparaminput(cx))or(cdblockslab and sparaminput(dx));
|
| 445 |
|
|
-- sfactor(f8) <= (not(cdblockslab) and sparaminput(cy))or(cdblockslab and sparaminput(dy));
|
| 446 |
|
|
-- sfactor(f9) <= (not(cdblockslab) and sparaminput(cy))or(cdblockslab and sparaminput(dy));
|
| 447 |
|
|
-- sfactor(f10) <= (not(cdblockslab) and sparaminput(cz))or(cdblockslab and sparaminput(dz));
|
| 448 |
|
|
-- sfactor(f11) <= (not(cdblockslab) and sparaminput(cz))or(cdblockslab and sparaminput(dz));
|
| 449 |
|
|
--
|
| 450 |
|
|
-- end if;
|
| 451 |
|
|
-- end if;
|
| 452 |
|
|
--
|
| 453 |
|
|
-- end process;
|
| 454 |
|
|
--
|
| 455 |
|
|
|
| 456 |
123 |
jguarin200 |
end dpc_arch;
|
