Subversion Repositories raytrac

# TCL File Generated by Component Editor 11.0

# Tue Jun 05 21:33:32 COT 2012

# DO NOT MODIFY

# +-----------------------------------

# | 

# | RayTrAC "RayTrAC" v1.0

# | null 2012.06.05.21:33:32

# | 

# | 

# | //IMACJULIAN/imac/Code/Indigo/fp/fp/raytrac.vhd

# | 

# |    ./arithpack.vhd syn, sim

# |    ./raytrac.vhd syn, sim

# | 

# +-----------------------------------

# +-----------------------------------

# | request TCL package from ACDS 11.0

# | 

package require -exact sopc 11.0

# | 

# +-----------------------------------

# +-----------------------------------

# | module RayTrAC

# | 

set_module_property NAME RayTrAC

set_module_property VERSION 1.0

set_module_property INTERNAL false

set_module_property OPAQUE_ADDRESS_MAP true

set_module_property GROUP "Arithmetic RayTrac Components"

set_module_property DISPLAY_NAME RayTrAC

set_module_property TOP_LEVEL_HDL_FILE raytrac.vhd

set_module_property TOP_LEVEL_HDL_MODULE raytrac

set_module_property INSTANTIATE_IN_SYSTEM_MODULE true

set_module_property EDITABLE true

set_module_property ANALYZE_HDL TRUE

set_module_property STATIC_TOP_LEVEL_MODULE_NAME ""

set_module_property FIX_110_VIP_PATH false

# | 

# +-----------------------------------

# +-----------------------------------

# | files

# | 

add_file arithpack.vhd {SYNTHESIS SIMULATION}

add_file raytrac.vhd {SYNTHESIS SIMULATION}

# | 

# +-----------------------------------

# +-----------------------------------

# | parameters

# | 

# | 

# +-----------------------------------

# +-----------------------------------

# | display items

# | 

# | 

# +-----------------------------------

# +-----------------------------------

# | connection point clock

# | 

add_interface clock clock end

set_interface_property clock clockRate 0

set_interface_property clock ENABLED true

add_interface_port clock clk clk Input 1

# | 

# +-----------------------------------

# +-----------------------------------

# | connection point avalon_slave_0

# | 

add_interface avalon_slave_0 avalon end

set_interface_property avalon_slave_0 addressAlignment DYNAMIC

set_interface_property avalon_slave_0 addressUnits WORDS

set_interface_property avalon_slave_0 associatedClock clock

set_interface_property avalon_slave_0 burstOnBurstBoundariesOnly false

set_interface_property avalon_slave_0 explicitAddressSpan 0

set_interface_property avalon_slave_0 holdTime 0

set_interface_property avalon_slave_0 isMemoryDevice false

set_interface_property avalon_slave_0 isNonVolatileStorage false

set_interface_property avalon_slave_0 linewrapBursts false

set_interface_property avalon_slave_0 maximumPendingReadTransactions 0

set_interface_property avalon_slave_0 printableDevice false

set_interface_property avalon_slave_0 readLatency 0

set_interface_property avalon_slave_0 readWaitTime 1

set_interface_property avalon_slave_0 setupTime 0

set_interface_property avalon_slave_0 timingUnits Cycles

set_interface_property avalon_slave_0 writeWaitTime 0

set_interface_property avalon_slave_0 ENABLED true

add_interface_port avalon_slave_0 wr write Input 1

add_interface_port avalon_slave_0 add address Input 13

add_interface_port avalon_slave_0 d writedata Input 32

add_interface_port avalon_slave_0 q readdata Output 32

add_interface_port avalon_slave_0 rd read Input 1

# | 

# +-----------------------------------

# +-----------------------------------

# | connection point reset_sink

# | 

add_interface reset_sink reset end

set_interface_property reset_sink associatedClock clock

set_interface_property reset_sink synchronousEdges DEASSERT

set_interface_property reset_sink ENABLED true

add_interface_port reset_sink rst reset_n Input 1

# | 

# +-----------------------------------

# +-----------------------------------

# | connection point interrupt_sender_1

# | 

add_interface interrupt_sender_1 interrupt end

set_interface_property interrupt_sender_1 associatedAddressablePoint avalon_slave_0

set_interface_property interrupt_sender_1 associatedClock clock

set_interface_property interrupt_sender_1 ENABLED true

add_interface_port interrupt_sender_1 irq irq Output 1

# | 

# +-----------------------------------