URL https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk

Subversion Repositories riscv_vhdl

[/] [riscv_vhdl/] [trunk/] [debugger/] [.gitignore] - Blame information for rev 2


*.sdf
*.opensdf
*.suo
*.err
Debug
Release
*.log
*.rcc
linuxbuild
win32build
win64build
moc_*.h

Line No.	Rev	Author	Line
1	2	sergeykhbr	`*.sdf`
2			`*.opensdf`
3			`*.suo`
4			`*.err`
5			`Debug`
6			`Release`
7			`*.log`
8			`*.rcc`
9			`linuxbuild`
10			`win32build`
11			`win64build`
12			`moc_*.h`