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[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [common/] [coreservices/] [imemop.h] - Blame information for rev 4

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/**
 * @file
 * @copyright  Copyright 2016 GNSS Sensor Ltd. All right reserved.
 * @author     Sergey Khabarov - sergeykhbr@gmail.com
 * @brief      Memory Operation interface implemented by slave devices on bus.
 */
 
#ifndef __DEBUGGER_IMEMOP_PLUGIN_H__
#define __DEBUGGER_IMEMOP_PLUGIN_H__
 
#include <inttypes.h>
#include <iface.h>
#include <attribute.h>
 
namespace debugger {
class IService;
 
static const char *const IFACE_MEMORY_OPERATION = "IMemoryOperation";
static const char *const IFACE_AXI4_NB_RESPONSE = "IAxi4NbResponse";
 
static const int PAYLOAD_MAX_BYTES = 8;
 
enum EAxi4Action {
    MemAction_Read,
    MemAction_Write,
    MemAction_Total
};
 
enum EAxi4Response {
    MemResp_Valid,
    MemResp_Accepted,
    MemResp_Error
};
 
enum ETransStatus {
    TRANS_OK,
    TRANS_ERROR
};
 
typedef struct Axi4TransactionType {
    EAxi4Action action;
    EAxi4Response response;
    uint32_t xsize;             // [Bytes] Isn't used XSize AXI format!!!.
    uint32_t wstrb;             // 1 bit per byte
    uint64_t addr;
    union {
        uint8_t b8[PAYLOAD_MAX_BYTES];
        uint16_t b16[PAYLOAD_MAX_BYTES/sizeof(uint16_t)];
        uint32_t b32[PAYLOAD_MAX_BYTES/sizeof(uint32_t)];
        uint64_t b64[PAYLOAD_MAX_BYTES/sizeof(uint64_t)];
    } rpayload, wpayload;
    int source_idx;             // Need for bus utilization statistic
} Axi4TransactionType;
 
/**
 * Non-blocking memory access response interface (Initiator/Master)
 */
class IAxi4NbResponse : public IFace {
 public:
    IAxi4NbResponse() : IFace(IFACE_AXI4_NB_RESPONSE) {}
 
    virtual void nb_response(Axi4TransactionType *trans) = 0;
};
 
/**
 * Slave/Targer interface
 */
class IMemoryOperation : public IFace {
 public:
    IMemoryOperation() : IFace(IFACE_MEMORY_OPERATION) {
        imap_.make_list(0);
        listMap_.make_list(0);
        baseAddress_.make_uint64(0);
        length_.make_uint64(0);
    }
 
    /**
     * Add new device to memory space. Mapping device has to implement
     * IMemoryOperaton interface.
     */
    virtual void map(IMemoryOperation *imemop) {
        AttributeType t1(imemop);
        imap_.add_to_list(&t1);
    }
 
    /**
     * Blocking transaction
     *
     * Must be implemented by any functional/systemc device mapped into memory
     */
    virtual ETransStatus b_transport(Axi4TransactionType *trans) = 0;
 
    /**
     * Non-blocking transaction
     *
     * Can be implemented for interaction with the SystemC model for an example.
     * Default implementation re-direct to blocking transport
     */
    virtual ETransStatus nb_transport(Axi4TransactionType *trans,
                              IAxi4NbResponse *cb) {
        ETransStatus ret = b_transport(trans);
        cb->nb_response(trans);
        return ret;
    }
 
    virtual uint64_t getBaseAddress() { return baseAddress_.to_uint64(); }
    virtual void setBaseAddress(uint64_t addr) {
        baseAddress_.make_uint64(addr);
    }
 
    virtual uint64_t getLength() { return length_.to_uint64(); }
 
    /** Higher value, higher priority */
    virtual int getPriority() { return priority_.to_int(); }
    virtual void setPriority(int v) { priority_.make_int64(v); }
 
 protected:
    friend class IService;
    AttributeType listMap_;
    AttributeType imap_;
    AttributeType baseAddress_;
    AttributeType length_;
    AttributeType priority_;
};
 
}  // namespace debugger
 
#endif  // __DEBUGGER_IMEMOP_PLUGIN_H__

Line No.	Rev	Author	Line
1	4	sergeykhbr	`/**`
2			`* @file`
3			`* @copyright Copyright 2016 GNSS Sensor Ltd. All right reserved.`
4			`* @author Sergey Khabarov - sergeykhbr@gmail.com`
5			`* @brief Memory Operation interface implemented by slave devices on bus.`
6			`*/`
7
8			`#ifndef __DEBUGGER_IMEMOP_PLUGIN_H__`
9			`#define __DEBUGGER_IMEMOP_PLUGIN_H__`
10
11			`#include <inttypes.h>`
12			`#include <iface.h>`
13			`#include <attribute.h>`
14
15			`namespace debugger {`
16			`class IService;`
17
18			`static const char *const IFACE_MEMORY_OPERATION = "IMemoryOperation";`
19			`static const char *const IFACE_AXI4_NB_RESPONSE = "IAxi4NbResponse";`
20
21			`static const int PAYLOAD_MAX_BYTES = 8;`
22
23			`enum EAxi4Action {`
24			`MemAction_Read,`
25			`MemAction_Write,`
26			`MemAction_Total`
27			`};`
28
29			`enum EAxi4Response {`
30			`MemResp_Valid,`
31			`MemResp_Accepted,`
32			`MemResp_Error`
33			`};`
34
35			`enum ETransStatus {`
36			`TRANS_OK,`
37			`TRANS_ERROR`
38			`};`
39
40			`typedef struct Axi4TransactionType {`
41			`EAxi4Action action;`
42			`EAxi4Response response;`
43			`uint32_t xsize; // [Bytes] Isn't used XSize AXI format!!!.`
44			`uint32_t wstrb; // 1 bit per byte`
45			`uint64_t addr;`
46			`union {`
47			`uint8_t b8[PAYLOAD_MAX_BYTES];`
48			`uint16_t b16[PAYLOAD_MAX_BYTES/sizeof(uint16_t)];`
49			`uint32_t b32[PAYLOAD_MAX_BYTES/sizeof(uint32_t)];`
50			`uint64_t b64[PAYLOAD_MAX_BYTES/sizeof(uint64_t)];`
51			`} rpayload, wpayload;`
52			`int source_idx; // Need for bus utilization statistic`
53			`} Axi4TransactionType;`
54
55			`/**`
56			`* Non-blocking memory access response interface (Initiator/Master)`
57			`*/`
58			`class IAxi4NbResponse : public IFace {`
59			`public:`
60			`IAxi4NbResponse() : IFace(IFACE_AXI4_NB_RESPONSE) {}`
61
62			`virtual void nb_response(Axi4TransactionType *trans) = 0;`
63			`};`
64
65			`/**`
66			`* Slave/Targer interface`
67			`*/`
68			`class IMemoryOperation : public IFace {`
69			`public:`
70			`IMemoryOperation() : IFace(IFACE_MEMORY_OPERATION) {`
71			`imap_.make_list(0);`
72			`listMap_.make_list(0);`
73			`baseAddress_.make_uint64(0);`
74			`length_.make_uint64(0);`
75			`}`
76
77			`/**`
78			`* Add new device to memory space. Mapping device has to implement`
79			`* IMemoryOperaton interface.`
80			`*/`
81			`virtual void map(IMemoryOperation *imemop) {`
82			`AttributeType t1(imemop);`
83			`imap_.add_to_list(&t1);`
84			`}`
85
86			`/**`
87			`* Blocking transaction`
88			`*`
89			`* Must be implemented by any functional/systemc device mapped into memory`
90			`*/`
91			`virtual ETransStatus b_transport(Axi4TransactionType *trans) = 0;`
92
93			`/**`
94			`* Non-blocking transaction`
95			`*`
96			`* Can be implemented for interaction with the SystemC model for an example.`
97			`* Default implementation re-direct to blocking transport`
98			`*/`
99			`virtual ETransStatus nb_transport(Axi4TransactionType *trans,`
100			`IAxi4NbResponse *cb) {`
101			`ETransStatus ret = b_transport(trans);`
102			`cb->nb_response(trans);`
103			`return ret;`
104			`}`
105
106			`virtual uint64_t getBaseAddress() { return baseAddress_.to_uint64(); }`
107			`virtual void setBaseAddress(uint64_t addr) {`
108			`baseAddress_.make_uint64(addr);`
109			`}`
110
111			`virtual uint64_t getLength() { return length_.to_uint64(); }`
112
113			`/** Higher value, higher priority */`
114			`virtual int getPriority() { return priority_.to_int(); }`
115			`virtual void setPriority(int v) { priority_.make_int64(v); }`
116
117			`protected:`
118			`friend class IService;`
119			`AttributeType listMap_;`
120			`AttributeType imap_;`
121			`AttributeType baseAddress_;`
122			`AttributeType length_;`
123			`AttributeType priority_;`
124			`};`
125
126			`} // namespace debugger`
127
128			`#endif // __DEBUGGER_IMEMOP_PLUGIN_H__`

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[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [common/] [coreservices/] [imemop.h] - Blame information for rev 4