OpenCores
URL https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk

Subversion Repositories riscv_vhdl

[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [socsim_plugin/] [pnp.cpp] - Blame information for rev 2

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 sergeykhbr
/**
2
 * @file
3
 * @copyright  Copyright 2016 GNSS Sensor Ltd. All right reserved.
4
 * @author     Sergey Khabarov - sergeykhbr@gmail.com
5
 * @brief      Plug'n'Play device functional model.
6
 */
7
 
8
#include "api_core.h"
9
#include "pnp.h"
10
#include "types_amba.h"
11
 
12
namespace debugger {
13
 
14
PNP::PNP(const char *name)  : IService(name) {
15
    registerInterface(static_cast<IMemoryOperation *>(this));
16
    registerAttribute("BaseAddress", &baseAddress_);
17
    registerAttribute("Length", &length_);
18
    registerAttribute("Tech", &tech_);
19
    registerAttribute("AdcDetector", &adc_detector_);
20
 
21
    baseAddress_.make_uint64(0);
22
    length_.make_uint64(0);
23
    tech_.make_uint64(0);
24
    adc_detector_.make_uint64(0);
25
 
26
    memset(&regs_, 0, sizeof(regs_));
27
    iter_.buf = regs_.cfg_table;
28
    regs_.hwid = 0x20170313;
29
    regs_.fwid = 0xdeadcafe;
30
    regs_.tech.bits.tech = TECH_INFERRED;
31
    regs_.tech.bits.mst_total = 0;
32
    regs_.tech.bits.slv_total = 0;
33
 
34
    addMaster(0, VENDOR_GNSSSENSOR, RISCV_RIVER_CPU);
35
    addMaster(1, VENDOR_GNSSSENSOR, MST_DID_EMPTY);
36
    addMaster(2, VENDOR_GNSSSENSOR, GAISLER_ETH_MAC_MASTER);
37
    addMaster(3, VENDOR_GNSSSENSOR, GAISLER_ETH_EDCL_MASTER);
38
 
39
    addSlave(0, 8*1024, 0, VENDOR_GNSSSENSOR, GNSSSENSOR_BOOTROM);
40
    addSlave(0x00100000, 256*1024, 0, VENDOR_GNSSSENSOR, GNSSSENSOR_FWIMAGE);
41
    addSlave(0x10000000, 512*1024, 0, VENDOR_GNSSSENSOR, GNSSSENSOR_SRAM);
42
    addSlave(0x80000000, 4*1024, 0, VENDOR_GNSSSENSOR, GNSSSENSOR_GPIO);
43
    addSlave(0x80001000, 4*1024, 1, VENDOR_GNSSSENSOR, GNSSSENSOR_UART);
44
    addSlave(0x80002000, 4*1024, 0, VENDOR_GNSSSENSOR, GNSSSENSOR_IRQCTRL);
45
    addSlave(0x80003000, 4*1024, 5, VENDOR_GNSSSENSOR, GNSSSENSOR_ENGINE_STUB);
46
    addSlave(0x80004000, 4*1024, 0, VENDOR_GNSSSENSOR, GNSSSENSOR_RF_CONTROL);
47
    addSlave(0x80005000, 4*1024, 3, VENDOR_GNSSSENSOR, GNSSSENSOR_GPTIMERS);
48
    addSlave(0x80006000, 4*1024, 2, VENDOR_GNSSSENSOR, GNSSSENSOR_ETHMAC);
49
    addSlave(0x80007000, 4*1024, 0, VENDOR_GNSSSENSOR, GNSSSENSOR_DSU);
50
    addSlave(0x80008000, 4*1024, 0, VENDOR_GNSSSENSOR, GNSSSENSOR_FSE_V2_GPS);
51
    addSlave(0xfffff000, 4*1024, 0, VENDOR_GNSSSENSOR, GNSSSENSOR_PNP);
52
}
53
 
54
PNP::~PNP() {
55
}
56
 
57
void PNP::addMaster(unsigned idx, unsigned vid, unsigned did) {
58
    regs_.tech.bits.mst_total++;
59
    iter_.item->mst.vid = vid;
60
    iter_.item->mst.did = did;
61
    iter_.item->mst.descr.bits.descrtype = PNP_CFG_TYPE_MASTER;
62
    iter_.item->mst.descr.bits.descrsize = sizeof(MasterConfigType);
63
    iter_.buf += sizeof(MasterConfigType);
64
}
65
 
66
void PNP::addSlave(uint64_t addr, uint64_t size, unsigned irq, unsigned vid, unsigned did) {
67
    regs_.tech.bits.slv_total++;
68
    iter_.item->slv.vid = vid;
69
    iter_.item->slv.did = did;
70
    iter_.item->slv.descr.bits.descrtype = PNP_CFG_TYPE_SLAVE;
71
    iter_.item->slv.descr.bits.descrsize = sizeof(SlaveConfigType);
72
    iter_.item->slv.descr.bits.bar_total = 1;
73
    iter_.item->slv.descr.bits.irq_idx = irq;
74
    iter_.item->slv.xaddr = static_cast<uint32_t>(addr);
75
    iter_.item->slv.xmask = static_cast<uint32_t>(~(size - 1));
76
    iter_.buf += sizeof(SlaveConfigType);
77
}
78
 
79
void PNP::postinitService() {
80
    regs_.tech.bits.tech = static_cast<uint8_t>(tech_.to_uint64());
81
    regs_.tech.bits.adc_detect =
82
        static_cast<uint8_t>(adc_detector_.to_uint64());
83
}
84
 
85
void PNP::b_transport(Axi4TransactionType *trans) {
86
    uint64_t mask = (length_.to_uint64() - 1);
87
    uint64_t off = ((trans->addr - getBaseAddress()) & mask);
88
    uint8_t *mem_ = reinterpret_cast<uint8_t *>(&regs_);
89
    if (trans->action == MemAction_Write) {
90
        for (uint64_t i = 0; i < trans->xsize; i++) {
91
            if ((trans->wstrb & (1 << i)) == 0) {
92
                continue;
93
            }
94
            mem_[off + i] = trans->wpayload.b8[i];
95
        }
96
    } else {
97
        for (uint64_t i = 0; i < trans->xsize; i++) {
98
            trans->rpayload.b8[i] = mem_[off + i];
99
        }
100
    }
101
}
102
 
103
}  // namespace debugger
104
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.