1 |
5 |
sergeykhbr |
-----------------------------------------------------------------------------
|
2 |
|
|
--! @file
|
3 |
|
|
--! @copyright Copyright 2017 GNSS Sensor Ltd. All right reserved.
|
4 |
|
|
--! @author Sergey Khabarov - sergeykhbr@gmail.com
|
5 |
|
|
--! @brief Definition of the config_common package.
|
6 |
|
|
--! @details This file defines constants and the system paramters that are
|
7 |
|
|
--! valid for any ASIC, FPGA and Simulation projects.
|
8 |
|
|
------------------------------------------------------------------------------
|
9 |
|
|
|
10 |
|
|
--! @defgroup config_common_group SoC configuration constants
|
11 |
|
|
--! @ingroup generic_group
|
12 |
|
|
--! @details Target independible constants that are the same for FPGA, ASIC
|
13 |
|
|
--! and behaviour simulation.
|
14 |
|
|
--! @{
|
15 |
|
|
--!
|
16 |
|
|
|
17 |
|
|
--! Standard library
|
18 |
|
|
library IEEE;
|
19 |
|
|
--! Standard signal definitions
|
20 |
|
|
use IEEE.STD_LOGIC_1164.ALL;
|
21 |
|
|
|
22 |
|
|
--! Technology definition library
|
23 |
|
|
library techmap;
|
24 |
|
|
--! Generic IDs constants import
|
25 |
|
|
use techmap.gencomp.all;
|
26 |
|
|
library work;
|
27 |
|
|
use work.config_target.all;
|
28 |
|
|
|
29 |
|
|
--! @brief Techology independent configuration settings.
|
30 |
|
|
--! @details This file defines configuration that are valid for all supported
|
31 |
|
|
--! targets: behaviour simulation, FPGAs or ASICs.
|
32 |
|
|
package config_common is
|
33 |
|
|
|
34 |
|
|
--! @brief Disable/Enable River CPU instance.
|
35 |
|
|
--! @details When enabled platform will instantiate processor named as
|
36 |
|
|
--! "RIVER" entirely written on VHDL.
|
37 |
|
|
--! Otherwise "Rocket" will be used (developed by Berkley
|
38 |
|
|
--! team).
|
39 |
|
|
--! @warning DSU available only for \e "RIVER" processor.
|
40 |
|
|
constant CFG_COMMON_RIVER_CPU_ENABLE : boolean := true;
|
41 |
|
|
|
42 |
|
|
--! @brief HEX-image for the initialization of the Boot ROM.
|
43 |
|
|
--! @details This file is used by \e inferred ROM implementation.
|
44 |
|
|
constant CFG_SIM_BOOTROM_HEX : string :=
|
45 |
|
|
CFG_TOPDIR & "examples/boot/linuxbuild/bin/bootimage.hex";
|
46 |
|
|
|
47 |
|
|
--! @brief HEX-image for the initialization of the FwImage ROM.
|
48 |
|
|
--! @details This file is used by \e inferred ROM implementation.
|
49 |
|
|
constant CFG_SIM_FWIMAGE_HEX : string :=
|
50 |
|
|
CFG_TOPDIR & "examples/zephyr/gcc711/zephyr.hex";
|
51 |
|
|
|
52 |
|
|
|
53 |
|
|
--! @brief Hardware SoC Identificator.
|
54 |
|
|
--!
|
55 |
|
|
--! @details Read Only unique platform identificator that could be
|
56 |
|
|
--! read by firmware from the Plug'n'Play support module.
|
57 |
|
|
constant CFG_HW_ID : std_logic_vector(31 downto 0) := X"20180514";
|
58 |
|
|
|
59 |
|
|
--! @brief Enabling Ethernet MAC interface.
|
60 |
|
|
--! @details By default MAC module enables support of the debug feature EDCL.
|
61 |
|
|
constant CFG_ETHERNET_ENABLE : boolean := true;
|
62 |
|
|
|
63 |
|
|
--! @brief Enable/Disable Debug Unit
|
64 |
|
|
constant CFG_DSU_ENABLE : boolean := true;
|
65 |
|
|
|
66 |
|
|
end;
|
67 |
|
|
|
68 |
|
|
--! @}
|
69 |
|
|
--!
|