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cwalter |
/*
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* RISE microprocessor - Test program for UART
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*
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* Copyright (c) 2006 Jakob Lechner
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* File: $Id: uart_complex.s,v 1.1 2007-01-25 22:31:12 cwalter Exp $
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*/
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.text
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.org 0x0000
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/* address for status register */
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ld r8, #0x00
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ldhb r8, #0x80
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/* address for uart data register */
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ld r9, #0x01
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ldhb r9, #0x80
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/* address for data buffer */
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ld r10, addrlo(buffer)
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ldhb r10, addrhi(buffer)
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/* addresses for branch targets */
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ld r7, addrlo(main)
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ldhb r7, addrhi(main)
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ld r11, addrlo(check_rdrf)
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ldhb r11, addrhi(check_rdrf)
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ld r12, addrlo(check_tdre)
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ldhb r12, addrhi(check_tdre)
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/* wait for uart receiver data */
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main:
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ld r6, r10
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check_rdrf:
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ld r2, [r8]
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ld r3, #0x2
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and r2, r3
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jmpz r11
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/* data available, read data */
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ld r4, [r9]
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/* compare for newline. if newline output data */
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ld r1, #0x0a
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sub r1, r4
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jmpz r12
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st r4, [r6]
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add r6, #1
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jmp r11
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/* wait for transmitter register empty */
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check_tdre:
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ld r2, [r8]
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ld r3, #0x1
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and r2, r3
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jmpz r12
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/* transmitter register empty: send data */
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ld r2, r10
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sub r2, r6
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jmpz r7
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sub r6, #1
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ld r4, [r6]
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st r4, [r9]
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jmp r12
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.data
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.org 0x0200
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buffer:
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.space 128
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