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[/] [robust_axi2apb/] [trunk/] [src/] [base/] [axi2apb_wr.v] - Blame information for rev 8

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1 4 eyalhoc
<##//////////////////////////////////////////////////////////////////
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////                                                             ////
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////  Author: Eyal Hochberg                                      ////
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////          eyal@provartec.com                                 ////
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////                                                             ////
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////  Downloaded from: http://www.opencores.org                  ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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//// Copyright (C) 2010 Provartec LTD                            ////
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//// www.provartec.com                                           ////
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//// info@provartec.com                                          ////
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////                                                             ////
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//// This source file may be used and distributed without        ////
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//// restriction provided that this copyright statement is not   ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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////                                                             ////
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//// This source file is free software; you can redistribute it  ////
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//// and/or modify it under the terms of the GNU Lesser General  ////
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//// Public License as published by the Free Software Foundation.////
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////                                                             ////
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//// This source is distributed in the hope that it will be      ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied  ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR     ////
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//// PURPOSE.  See the GNU Lesser General Public License for more////
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//// details. http://www.gnu.org/licenses/lgpl.html              ////
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////                                                             ////
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//////////////////////////////////////////////////////////////////##>
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30 2 eyalhoc
INCLUDE def_axi2apb.txt
31 8 eyalhoc
OUTFILE PREFIX_wr.v
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33 8 eyalhoc
module  PREFIX_wr (PORTS);
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   input                          clk;
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   input                          reset;
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   input                  GROUP_APB3;
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   input                  cmd_err;
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   input [ID_BITS-1:0]    cmd_id;
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   output                 finish_wr;
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   port                   WGROUP_APB_AXI_W;
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   port                   BGROUP_APB_AXI_B;
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   parameter              RESP_OK     = 2'b00;
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   parameter              RESP_SLVERR = 2'b10;
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   parameter              RESP_DECERR = 2'b11;
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   reg                    BGROUP_APB_AXI_B.OUT;
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   assign                 finish_wr = BVALID & BREADY;
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   assign                 WREADY = psel & penable & pwrite & pready;
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   always @(posedge clk or posedge reset)
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     if (reset)
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           begin
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         BGROUP_APB_AXI_B.OUT <= #FFD {GROUP_APB_AXI_B.OUT.WIDTH{1'b0}};
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           end
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         else if (finish_wr)
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           begin
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         BGROUP_APB_AXI_B.OUT <= #FFD {GROUP_APB_AXI_B.OUT.WIDTH{1'b0}};
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           end
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         else if (psel & penable & pwrite & pready)
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           begin
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             BID    <= #FFD cmd_id;
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                 BRESP  <= #FFD cmd_err ? RESP_SLVERR : pslverr ? RESP_DECERR : RESP_OK;
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                 BVALID <= #FFD 1'b1;
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           end
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endmodule
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