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INCLUDE def_ic_static.txt
 
SWAP #FFD      #1                               ##flip-flop delay
 
SWAP PREFIX     fabric_MASTER_NUM_SLAVE_NUM     ##prefix for all module and file names
 
##fabric 0
BUILD
SWAP MASTER_NUM 3                               ##number of masters
SWAP SLAVE_NUM  8                               ##number of slaves
 
##DEFINE DEF_DECERR_SLV                         ##use interanl decode slave error
 
SWAP ID_BITS    2                               ##AXI ID bits
LOOP M0_IDX     1                               ##number of IDs for master 0
SWAP ID_M0_ID0  ID_BITS'b00                     ##master 0 ID0
LOOP M1_IDX     1                               ##number of IDs for master 1
SWAP ID_M1_ID0  ID_BITS'b01                     ##master 1 ID0
LOOP M2_IDX     1                               ##number of IDs for master 2
SWAP ID_M2_ID0  ID_BITS'b10                     ##master 2 ID0
 
SWAP CMD_DEPTH  8                               ##AXI command depth for read and write
 
SWAP DATA_BITS 64                               ##AXI data bits
SWAP ADDR_BITS 32                               ##AXI address bits
 
SWAP USER_BITS  4                               ##AXI user bits
ENDBUILD
 
##fabric 1
BUILD
SWAP MASTER_NUM 1                               ##number of masters
SWAP SLAVE_NUM  3                               ##number of slaves
 
DEFINE DEF_DECERR_SLV                           ##use interanl decode slave error
 
SWAP ID_BITS    2                               ##AXI ID bits
LOOP M0_IDX     3                               ##number of IDs for master 0
SWAP ID_M0_ID0  ID_BITS'b00                     ##master 0 ID0
SWAP ID_M0_ID1  ID_BITS'b01                     ##master 0 ID1
SWAP ID_M0_ID2  ID_BITS'b11                     ##master 0 ID2
 
SWAP CMD_DEPTH  4                               ##AXI command depth for read and write
 
SWAP DATA_BITS 32                               ##AXI data bits
SWAP ADDR_BITS 24                               ##AXI address bits
 
SWAP USER_BITS  0                               ##AXI user bits
ENDBUILD
 

Line No.	Rev	Author	Line
1	2	eyalhoc	`INCLUDE def_ic_static.txt`
2
3			`SWAP #FFD #1 ##flip-flop delay`
4
5			`SWAP PREFIX fabric_MASTER_NUM_SLAVE_NUM ##prefix for all module and file names`
6
7			`##fabric 0`
8			`BUILD`
9			`SWAP MASTER_NUM 3 ##number of masters`
10			`SWAP SLAVE_NUM 8 ##number of slaves`
11
12			`##DEFINE DEF_DECERR_SLV ##use interanl decode slave error`
13
14			`SWAP ID_BITS 2 ##AXI ID bits`
15			`LOOP M0_IDX 1 ##number of IDs for master 0`
16			`SWAP ID_M0_ID0 ID_BITS'b00 ##master 0 ID0`
17			`LOOP M1_IDX 1 ##number of IDs for master 1`
18			`SWAP ID_M1_ID0 ID_BITS'b01 ##master 1 ID0`
19			`LOOP M2_IDX 1 ##number of IDs for master 2`
20			`SWAP ID_M2_ID0 ID_BITS'b10 ##master 2 ID0`
21
22			`SWAP CMD_DEPTH 8 ##AXI command depth for read and write`
23
24			`SWAP DATA_BITS 64 ##AXI data bits`
25			`SWAP ADDR_BITS 32 ##AXI address bits`
26
27			`SWAP USER_BITS 4 ##AXI user bits`
28			`ENDBUILD`
29
30			`##fabric 1`
31			`BUILD`
32			`SWAP MASTER_NUM 1 ##number of masters`
33			`SWAP SLAVE_NUM 3 ##number of slaves`
34
35			`DEFINE DEF_DECERR_SLV ##use interanl decode slave error`
36
37			`SWAP ID_BITS 2 ##AXI ID bits`
38			`LOOP M0_IDX 3 ##number of IDs for master 0`
39			`SWAP ID_M0_ID0 ID_BITS'b00 ##master 0 ID0`
40			`SWAP ID_M0_ID1 ID_BITS'b01 ##master 0 ID1`
41			`SWAP ID_M0_ID2 ID_BITS'b11 ##master 0 ID2`
42
43			`SWAP CMD_DEPTH 4 ##AXI command depth for read and write`
44
45			`SWAP DATA_BITS 32 ##AXI data bits`
46			`SWAP ADDR_BITS 24 ##AXI address bits`
47
48			`SWAP USER_BITS 0 ##AXI user bits`
49			`ENDBUILD`
50

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[/] [robust_axi_fabric/] [trunk/] [src/] [base/] [def_ic.txt] - Blame information for rev 2