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[/] [rs_encoder_decoder/] [rtl/] [GF8SyndromBuffer.v] - Blame information for rev 2

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1 2 farooq21
// THIS IS A SYNDROME BUFFER THAT PUTS DATA IN FIFO 
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// AND DATA CAN BE PICKED FROM THE LAST OF THE FIFO 
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// OR FROM LOCATION SPECIFIED BY loc_i 
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module GF8SyndromBuffer(clk_i, rst_i,
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  push_i,          // push data
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  sel_i,           // Enable Signal
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  loc_i,           // Enable Signal
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  syndrom_i,       // input syndrom
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  syndrom_o       // data from loc
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  );
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  // Inputs are declared here
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  input clk_i,rst_i,push_i;                     // Clock and Reset Declaration
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  input sel_i;
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  input [4:0] loc_i;
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  input [7:0] syndrom_i;
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  output wire [7:0] syndrom_o;
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 // This is first 2*t syndrome buffer 
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  reg [7:0] shift_reg[0:16];
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  assign syndrom_o = sel_i?shift_reg[loc_i]:shift_reg[16];
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  // Sequential Body
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  always @(posedge clk_i or posedge rst_i) begin
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    if (rst_i) begin
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      shift_reg[0] <= 0;
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      shift_reg[1] <= 0;
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      shift_reg[2] <= 0;
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      shift_reg[3] <= 0;
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      shift_reg[4] <= 0;
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      shift_reg[5] <= 0;
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      shift_reg[6] <= 0;
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      shift_reg[7] <= 0;
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      shift_reg[8] <= 0;
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      shift_reg[9] <= 0;
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      shift_reg[10] <= 0;
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      shift_reg[11] <= 0;
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      shift_reg[12] <= 0;
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      shift_reg[13] <= 0;
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      shift_reg[14] <= 0;
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      shift_reg[15] <= 0;
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      shift_reg[16] <= 0;
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    end
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    else if(push_i) begin
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      shift_reg[0] <= syndrom_i;
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      shift_reg[1] <= shift_reg[0];
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      shift_reg[2] <= shift_reg[1];
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      shift_reg[3] <= shift_reg[2];
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      shift_reg[4] <= shift_reg[3];
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      shift_reg[5] <= shift_reg[4];
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      shift_reg[6] <= shift_reg[5];
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      shift_reg[7] <= shift_reg[6];
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      shift_reg[8] <= shift_reg[7];
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      shift_reg[9] <= shift_reg[8];
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      shift_reg[10] <= shift_reg[9];
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      shift_reg[11] <= shift_reg[10];
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      shift_reg[12] <= shift_reg[11];
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      shift_reg[13] <= shift_reg[12];
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      shift_reg[14] <= shift_reg[13];
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      shift_reg[15] <= shift_reg[14];
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      shift_reg[16] <= shift_reg[15];
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    end
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  end
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endmodule

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