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// ============================================================================
//        __
//   \\__/ o\    (C) 2013  Robert Finch, Stratford
//    \  __ /    All rights reserved.
//     \/_//     robfinch<remove>@opencores.org
//       ||
//
// This source file is free software: you can redistribute it and/or modify 
// it under the terms of the GNU Lesser General Public License as published 
// by the Free Software Foundation, either version 3 of the License, or     
// (at your option) any later version.                                      
//                                                                          
// This source file is distributed in the hope that it will be useful,      
// but WITHOUT ANY WARRANTY; without even the implied warranty of           
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
// GNU General Public License for more details.                             
//                                                                          
// You should have received a copy of the GNU General Public License        
// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
//                                                                          
// ============================================================================
//
BYTE_IFETCH:
        begin
                ic_whence <= BYTE_IFETCH;
                vect <= m816 ? `BRK_VECT_816 : `BYTE_IRQ_VECT;
                vect[31:16] <= abs8[31:16];
                suppress_pcinc <= 4'hF;                         // default: no suppression of increment
                opc <= pc;
                hwi <= `FALSE;
                isBusErr <= `FALSE;
                pg2 <= `FALSE;
                isIY <= `FALSE;
                isIY24 <= `FALSE;
                store_what <= m16 ? `STW_DEF70 : `STW_DEF;
                if (nmi_edge & gie) begin
                        ir[7:0] <= `BRK;
                        nmi_edge <= 1'b0;
                        wai <= 1'b0;
                        hwi <= `TRUE;
                        if (nmoi) begin
                                vect <= `NMI_VECT;
                                next_state(DECODE);
                        end
                        else begin
                                vect <= m816 ? `NMI_VECT_816 : `BYTE_NMI_VECT;
                                vect[31:16] <= abs8[31:16];
                                next_state(BYTE_DECODE);
                        end
                end
                else if (irq_i & gie) begin
                        wai <= 1'b0;
                        if (im) begin
                                if (unCachedInsn) begin
                                        if (bhit) begin
                                                ir <= ibuf;
                                                next_state(BYTE_DECODE);
                                        end
                                        else
                                                next_state(LOAD_IBUF1);
                                end
                                else begin
                                        if (ihit) begin
                                                ir <= insn;
                                                next_state(BYTE_DECODE);
                                        end
                                        else
                                                next_state(ICACHE1);
                                end
                        end
                        else begin
                                ir[7:0] <= `BRK;
                                if (m816)
                                        vect <= `IRQ_VECT_816;
                                hwi <= `TRUE;
                                if (nmoi) begin
                                        vect <= {vbr[31:9],irq_vect,2'b00};
                                        next_state(DECODE);
                                end
                                else begin
                                        next_state(BYTE_DECODE);
                                end
                        end
                end
                else if (!wai) begin
                        if (unCachedInsn) begin
                                if (bhit) begin
                                        ir <= ibuf;
                                        next_state(BYTE_DECODE);
                                end
                                else
                                        next_state(LOAD_IBUF1);
                        end
                        else begin
                                if (ihit) begin
                                        ir <= insn;
                                        next_state(BYTE_DECODE);
                                end
                                else
                                        next_state(ICACHE1);
                        end
                end
`ifdef DEBUG
                if (hist_capture) begin
                        history_buf[history_ndx] <= pc;
                        history_ndx <= history_ndx+7'd1;
                end
`endif
                case(ir[7:0])
                // Note the break flag is not affected by SEP/REP
                // Setting the index registers to eight bit zeros out the upper part of the register.
                `SEP:
                        begin
                                cf <= cf | ir[8];
                                zf <= zf | ir[9];
                                im <= im | ir[10];
                                df <= df | ir[11];
                                if (m816) begin
                                        x_bit <= x_bit | ir[12];
                                        m_bit <= m_bit | ir[13];
                                        //if (ir[13]) acc[31:8] <= 24'd0;
                                        if (ir[12]) begin
                                                x[31:8] <= 24'd0;
                                                y[31:8] <= 24'd0;
                                        end
                                end
                                vf <= vf | ir[14];
                                nf <= nf | ir[15];
                        end
                `REP:
                        begin
                                cf <= cf & ~ir[8];
                                zf <= zf & ~ir[9];
                                im <= im & ~ir[10];
                                df <= df & ~ir[11];
                                if (m816) begin
                                        x_bit <= x_bit & ~ir[12];
                                        m_bit <= m_bit & ~ir[13];
                                end
                                vf <= vf & ~ir[14];
                                nf <= nf & ~ir[15];
                        end
                `XBA:
                        begin
                                acc[15:0] <= res16[15:0];
                                nf <= resn8;
                                zf <= resz8;
                        end
                `TAY,`TXY,`DEY,`INY:            if (xb16) begin y[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end   else begin y[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `TAX,`TYX,`TSX,`DEX,`INX:       if (xb16) begin x[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end else begin x[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `TSA,`TYA,`TXA,`INA,`DEA:       if (m16) begin acc[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end else begin acc[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `TAS,`TXS: begin if (m816) sp <= res16[15:0]; else sp <= {8'h01,res8[7:0]}; end
                `TCD:   begin dpr <= res16[15:0]; end
                `TDC:   begin acc[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end
                `ADC_IMM:
                        begin
                                if (m16) begin
                                        acc[15:0] <= df ? bcaio : res16[15:0];
                                        cf <= df ? bcaico : resc16;
//                                              vf <= resv8;
                                        vf <= (res16[15] ^ b16[15]) & (1'b1 ^ acc[15] ^ b16[15]);
                                        nf <= df ? bcaio[15] : resn16;
                                        zf <= df ? bcaio==16'h0000 : resz16;
                                end
                                else begin
                                        acc[7:0] <= df ? bcaio[7:0] : res8[7:0];
                                        cf <= df ? bcaico8 : resc8;
//                                              vf <= resv8;
                                        vf <= (res8[7] ^ b8[7]) & (1'b1 ^ acc[7] ^ b8[7]);
                                        nf <= df ? bcaio[7] : resn8;
                                        zf <= df ? bcaio[7:0]==8'h00 : resz8;
                                end
                        end
                `ADC_ZP,`ADC_ZPX,`ADC_IX,`ADC_IY,`ADC_IYL,`ADC_ABS,`ADC_ABSX,`ADC_ABSY,`ADC_I,`ADC_IL,`ADC_AL,`ADC_ALX,`ADC_DSP,`ADC_DSPIY:
                        begin
                                if (m16) begin
                                        acc[15:0] <= df ? bcao : res16[15:0];
                                        cf <= df ? bcaco : resc16;
                                        vf <= (res16[15] ^ b16[15]) & (1'b1 ^ acc[15] ^ b16[15]);
                                        nf <= df ? bcao[15] : resn16;
                                        zf <= df ? bcao==16'h0000 : resz16;
                                end
                                else begin
                                        acc[7:0] <= df ? bcao[7:0] : res8[7:0];
                                        cf <= df ? bcaco8 : resc8;
                                        vf <= (res8[7] ^ b8[7]) & (1'b1 ^ acc[7] ^ b8[7]);
                                        nf <= df ? bcao[7] : resn8;
                                        zf <= df ? bcao[7:0]==8'h00 : resz8;
                                end
                        end
                `SBC_IMM:
                        begin
                                if (m16) begin
                                        acc[15:0] <= df ? bcsio : res16[15:0];
                                        cf <= ~(df ? bcsico : resc16);
                                        vf <= (1'b1 ^ res16[15] ^ b16[15]) & (acc[15] ^ b16[15]);
                                        nf <= df ? bcsio[15] : resn16;
                                        zf <= df ? bcsio==16'h0000 : resz16;
                                end
                                else begin
                                        acc[7:0] <= df ? bcsio[7:0] : res8[7:0];
                                        cf <= ~(df ? bcsico8 : resc8);
                                        vf <= (1'b1 ^ res8[7] ^ b8[7]) & (acc[7] ^ b8[7]);
                                        nf <= df ? bcsio[7] : resn8;
                                        zf <= df ? bcsio[7:0]==8'h00 : resz8;
                                end
                        end
                `SBC_ZP,`SBC_ZPX,`SBC_IX,`SBC_IY,`SBC_IYL,`SBC_ABS,`SBC_ABSX,`SBC_ABSY,`SBC_I,`SBC_IL,`SBC_AL,`SBC_ALX,`SBC_DSP,`SBC_DSPIY:
                        begin
                                if (m16) begin
                                        acc[15:0] <= df ? bcso : res16[15:0];
                                        vf <= (1'b1 ^ res16[15] ^ b16[15]) & (acc[15] ^ b16[15]);
                                        cf <= ~(df ? bcsco : resc16);
                                        nf <= df ? bcso[15] : resn16;
                                        zf <= df ? bcso==16'h0000 : resz16;
                                end
                                else begin
                                        acc[7:0] <= df ? bcso[7:0] : res8[7:0];
                                        vf <= (1'b1 ^ res8[7] ^ b8[7]) & (acc[7] ^ b8[7]);
                                        cf <= ~(df ? bcsco8 : resc8);
                                        nf <= df ? bcso[7] : resn8;
                                        zf <= df ? bcso[7:0]==8'h00 : resz8;
                                end
                        end
                `CMP_IMM,`CMP_ZP,`CMP_ZPX,`CMP_IX,`CMP_IY,`CMP_IYL,`CMP_ABS,`CMP_ABSX,`CMP_ABSY,`CMP_I,`CMP_IL,`CMP_AL,`CMP_ALX,`CMP_DSP,`CMP_DSPIY:
                                if (m16) begin cf <= ~resc16; nf <= resn16; zf <= resz16; end else begin cf <= ~resc8; nf <= resn8; zf <= resz8; end
                `CPX_IMM,`CPX_ZP,`CPX_ABS,
                `CPY_IMM,`CPY_ZP,`CPY_ABS:
                                if (xb16) begin cf <= ~resc16; nf <= resn16; zf <= resz16; end else begin cf <= ~resc8; nf <= resn8; zf <= resz8; end
                `BIT_IMM,`BIT_ZP,`BIT_ZPX,`BIT_ABS,`BIT_ABSX:
                                if (m16) begin nf <= b16[15]; vf <= b16[14]; zf <= resz16; end else begin nf <= b8[7]; vf <= b8[6]; zf <= resz8; end
                `TRB_ZP,`TRB_ABS,`TSB_ZP,`TSB_ABS:
                        if (m16) begin zf <= resz16; end else begin zf <= resz8; end
                `LDA_IMM,`LDA_ZP,`LDA_ZPX,`LDA_IX,`LDA_IY,`LDA_IYL,`LDA_ABS,`LDA_ABSX,`LDA_ABSY,`LDA_I,`LDA_IL,`LDA_AL,`LDA_ALX,`LDA_DSP,`LDA_DSPIY,
                `AND_IMM,`AND_ZP,`AND_ZPX,`AND_IX,`AND_IY,`AND_IYL,`AND_ABS,`AND_ABSX,`AND_ABSY,`AND_I,`AND_IL,`AND_AL,`AND_ALX,`AND_DSP,`AND_DSPIY,
                `ORA_IMM,`ORA_ZP,`ORA_ZPX,`ORA_IX,`ORA_IY,`ORA_IYL,`ORA_ABS,`ORA_ABSX,`ORA_ABSY,`ORA_I,`ORA_IL,`ORA_AL,`ORA_ALX,`ORA_DSP,`ORA_DSPIY,
                `EOR_IMM,`EOR_ZP,`EOR_ZPX,`EOR_IX,`EOR_IY,`EOR_IYL,`EOR_ABS,`EOR_ABSX,`EOR_ABSY,`EOR_I,`EOR_IL,`EOR_AL,`EOR_ALX,`EOR_DSP,`EOR_DSPIY:
                        if (m16) begin acc[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end
                        else begin acc[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `ASL_ACC:       if (m16) begin acc[15:0] <= res16[15:0]; cf <= resc16; nf <= resn16; zf <= resz16; end else begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
                `ROL_ACC:       if (m16) begin acc[15:0] <= res16[15:0]; cf <= resc16; nf <= resn16; zf <= resz16; end else begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
                `LSR_ACC:       if (m16) begin acc[15:0] <= res16[15:0]; cf <= resc16; nf <= resn16; zf <= resz16; end else begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
                `ROR_ACC:       if (m16) begin acc[15:0] <= res16[15:0]; cf <= resc16; nf <= resn16; zf <= resz16; end else begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
                `ASL_ZP,`ASL_ZPX,`ASL_ABS,`ASL_ABSX: if (m16) begin cf <= resc16; nf <= resn16; zf <= resz16; end else begin cf <= resc8; nf <= resn8; zf <= resz8; end
                `ROL_ZP,`ROL_ZPX,`ROL_ABS,`ROL_ABSX: if (m16) begin cf <= resc16; nf <= resn16; zf <= resz16; end else begin cf <= resc8; nf <= resn8; zf <= resz8; end
                `LSR_ZP,`LSR_ZPX,`LSR_ABS,`LSR_ABSX: if (m16) begin cf <= resc16; nf <= resn16; zf <= resz16; end else begin cf <= resc8; nf <= resn8; zf <= resz8; end
                `ROR_ZP,`ROR_ZPX,`ROR_ABS,`ROR_ABSX: if (m16) begin cf <= resc16; nf <= resn16; zf <= resz16; end else begin cf <= resc8; nf <= resn8; zf <= resz8; end
                `INC_ZP,`INC_ZPX,`INC_ABS,`INC_ABSX: if (m16) begin nf <= resn16; zf <= resz16; end else begin nf <= resn8; zf <= resz8; end
                `DEC_ZP,`DEC_ZPX,`DEC_ABS,`DEC_ABSX: if (m16) begin nf <= resn16; zf <= resz16; end else begin nf <= resn8; zf <= resz8; end
                `PLA:   if (m16) begin acc[15:0] <= res16[15:0]; zf <= resz16; nf <= resn16; end else begin acc[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
                `PLX:   if (xb16) begin x[15:0] <= res16[15:0]; zf <= resz16; nf <= resn16; end else begin x[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
                `PLY:   if (xb16) begin y[15:0] <= res16[15:0]; zf <= resz16; nf <= resn16; end else begin y[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
                `PLB:   begin dbr <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `PLD:   begin dpr <= res16[15:0]; nf <= resn16; zf <= resz16; end
                `LDX_IMM,`LDX_ZP,`LDX_ZPY,`LDX_ABS,`LDX_ABSY:   if (xb16) begin x[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end else begin x[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `LDY_IMM,`LDY_ZP,`LDY_ZPX,`LDY_ABS,`LDY_ABSX:   if (xb16) begin y[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end else begin y[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                endcase
        end

Line No.	Rev	Author	Line
1	32	robfinch	`// ============================================================================`
2			`// __`
3			`// \\__/ o\ (C) 2013 Robert Finch, Stratford`
4			`// \ __ / All rights reserved.`
5			`// \/_// robfinch<remove>@opencores.org`
6			`// \|\|`
7			`//`
8			`// This source file is free software: you can redistribute it and/or modify`
9			`// it under the terms of the GNU Lesser General Public License as published`
10			`// by the Free Software Foundation, either version 3 of the License, or`
11			`// (at your option) any later version.`
12			`//`
13			`// This source file is distributed in the hope that it will be useful,`
14			`// but WITHOUT ANY WARRANTY; without even the implied warranty of`
15			`// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
16			`// GNU General Public License for more details.`
17			`//`
18			`// You should have received a copy of the GNU General Public License`
19			`// along with this program. If not, see <http://www.gnu.org/licenses/>.`
20			`//`
21			`// ============================================================================`
22			`//`
23			`BYTE_IFETCH:`
24			`begin`
25	38	robfinch	`ic_whence <= BYTE_IFETCH;`
26			vect <= m816 ? `BRK_VECT_816 : `BYTE_IRQ_VECT;
27	35	robfinch	`vect[31:16] <= abs8[31:16];`
28	32	robfinch	`suppress_pcinc <= 4'hF; // default: no suppression of increment`
29			`opc <= pc;`
30			hwi <= `FALSE;
31			isBusErr <= `FALSE;
32			pg2 <= `FALSE;
33	38	robfinch	isIY <= `FALSE;
34			isIY24 <= `FALSE;
35			store_what <= m16 ? `STW_DEF70 : `STW_DEF;
36	35	robfinch	`if (nmi_edge & gie) begin`
37	32	robfinch	ir[7:0] <= `BRK;
38			`nmi_edge <= 1'b0;`
39			`wai <= 1'b0;`
40			hwi <= `TRUE;
41			`if (nmoi) begin`
42			vect <= `NMI_VECT;
43	35	robfinch	`next_state(DECODE);`
44	32	robfinch	`end`
45			`else begin`
46	38	robfinch	vect <= m816 ? `NMI_VECT_816 : `BYTE_NMI_VECT;
47	35	robfinch	`vect[31:16] <= abs8[31:16];`
48			`next_state(BYTE_DECODE);`
49	32	robfinch	`end`
50			`end`
51			`else if (irq_i & gie) begin`
52			`wai <= 1'b0;`
53			`if (im) begin`
54			`if (unCachedInsn) begin`
55			`if (bhit) begin`
56			`ir <= ibuf;`
57	35	robfinch	`next_state(BYTE_DECODE);`
58	32	robfinch	`end`
59			`else`
60	38	robfinch	`next_state(LOAD_IBUF1);`
61	32	robfinch	`end`
62			`else begin`
63			`if (ihit) begin`
64			`ir <= insn;`
65	35	robfinch	`next_state(BYTE_DECODE);`
66	32	robfinch	`end`
67			`else`
68	38	robfinch	`next_state(ICACHE1);`
69	32	robfinch	`end`
70			`end`
71			`else begin`
72			ir[7:0] <= `BRK;
73	38	robfinch	`if (m816)`
74			vect <= `IRQ_VECT_816;
75	32	robfinch	hwi <= `TRUE;
76			`if (nmoi) begin`
77			`vect <= {vbr[31:9],irq_vect,2'b00};`
78	35	robfinch	`next_state(DECODE);`
79	32	robfinch	`end`
80			`else begin`
81	35	robfinch	`next_state(BYTE_DECODE);`
82	32	robfinch	`end`
83			`end`
84			`end`
85			`else if (!wai) begin`
86			`if (unCachedInsn) begin`
87			`if (bhit) begin`
88			`ir <= ibuf;`
89	35	robfinch	`next_state(BYTE_DECODE);`
90	32	robfinch	`end`
91			`else`
92	38	robfinch	`next_state(LOAD_IBUF1);`
93	32	robfinch	`end`
94			`else begin`
95			`if (ihit) begin`
96			`ir <= insn;`
97	35	robfinch	`next_state(BYTE_DECODE);`
98	32	robfinch	`end`
99			`else`
100	38	robfinch	`next_state(ICACHE1);`
101	32	robfinch	`end`
102			`end`
103	35	robfinch	`ifdef DEBUG
104	32	robfinch	`if (hist_capture) begin`
105			`history_buf[history_ndx] <= pc;`
106			`history_ndx <= history_ndx+7'd1;`
107			`end`
108	35	robfinch	`endif
109	32	robfinch	`case(ir[7:0])`
110	38	robfinch	`// Note the break flag is not affected by SEP/REP`
111			`// Setting the index registers to eight bit zeros out the upper part of the register.`
112			`SEP:
113			`begin`
114			`cf <= cf \| ir[8];`
115			`zf <= zf \| ir[9];`
116			`im <= im \| ir[10];`
117			`df <= df \| ir[11];`
118			`if (m816) begin`
119			`x_bit <= x_bit \| ir[12];`
120			`m_bit <= m_bit \| ir[13];`
121			`//if (ir[13]) acc[31:8] <= 24'd0;`
122			`if (ir[12]) begin`
123			`x[31:8] <= 24'd0;`
124			`y[31:8] <= 24'd0;`
125			`end`
126			`end`
127			`vf <= vf \| ir[14];`
128			`nf <= nf \| ir[15];`
129			`end`
130			`REP:
131			`begin`
132			`cf <= cf & ~ir[8];`
133			`zf <= zf & ~ir[9];`
134			`im <= im & ~ir[10];`
135			`df <= df & ~ir[11];`
136			`if (m816) begin`
137			`x_bit <= x_bit & ~ir[12];`
138			`m_bit <= m_bit & ~ir[13];`
139			`end`
140			`vf <= vf & ~ir[14];`
141			`nf <= nf & ~ir[15];`
142			`end`
143			`XBA:
144			`begin`
145			`acc[15:0] <= res16[15:0];`
146			`nf <= resn8;`
147			`zf <= resz8;`
148			`end`
149			`TAY,`TXY,`DEY,`INY: if (xb16) begin y[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end else begin y[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
150			`TAX,`TYX,`TSX,`DEX,`INX: if (xb16) begin x[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end else begin x[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
151			`TSA,`TYA,`TXA,`INA,`DEA: if (m16) begin acc[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end else begin acc[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
152			`TAS,`TXS: begin if (m816) sp <= res16[15:0]; else sp <= {8'h01,res8[7:0]}; end
153			`TCD: begin dpr <= res16[15:0]; end
154			`TDC: begin acc[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end
155	32	robfinch	`ADC_IMM:
156			`begin`
157	38	robfinch	`if (m16) begin`
158			`acc[15:0] <= df ? bcaio : res16[15:0];`
159			`cf <= df ? bcaico : resc16;`
160	32	robfinch	`// vf <= resv8;`
161	38	robfinch	`vf <= (res16[15] ^ b16[15]) & (1'b1 ^ acc[15] ^ b16[15]);`
162			`nf <= df ? bcaio[15] : resn16;`
163			`zf <= df ? bcaio==16'h0000 : resz16;`
164			`end`
165			`else begin`
166			`acc[7:0] <= df ? bcaio[7:0] : res8[7:0];`
167			`cf <= df ? bcaico8 : resc8;`
168			`// vf <= resv8;`
169			`vf <= (res8[7] ^ b8[7]) & (1'b1 ^ acc[7] ^ b8[7]);`
170			`nf <= df ? bcaio[7] : resn8;`
171			`zf <= df ? bcaio[7:0]==8'h00 : resz8;`
172			`end`
173	32	robfinch	`end`
174	38	robfinch	`ADC_ZP,`ADC_ZPX,`ADC_IX,`ADC_IY,`ADC_IYL,`ADC_ABS,`ADC_ABSX,`ADC_ABSY,`ADC_I,`ADC_IL,`ADC_AL,`ADC_ALX,`ADC_DSP,`ADC_DSPIY:
175	32	robfinch	`begin`
176	38	robfinch	`if (m16) begin`
177			`acc[15:0] <= df ? bcao : res16[15:0];`
178			`cf <= df ? bcaco : resc16;`
179			`vf <= (res16[15] ^ b16[15]) & (1'b1 ^ acc[15] ^ b16[15]);`
180			`nf <= df ? bcao[15] : resn16;`
181			`zf <= df ? bcao==16'h0000 : resz16;`
182			`end`
183			`else begin`
184			`acc[7:0] <= df ? bcao[7:0] : res8[7:0];`
185			`cf <= df ? bcaco8 : resc8;`
186			`vf <= (res8[7] ^ b8[7]) & (1'b1 ^ acc[7] ^ b8[7]);`
187			`nf <= df ? bcao[7] : resn8;`
188			`zf <= df ? bcao[7:0]==8'h00 : resz8;`
189			`end`
190	32	robfinch	`end`
191			`SBC_IMM:
192			`begin`
193	38	robfinch	`if (m16) begin`
194			`acc[15:0] <= df ? bcsio : res16[15:0];`
195			`cf <= ~(df ? bcsico : resc16);`
196			`vf <= (1'b1 ^ res16[15] ^ b16[15]) & (acc[15] ^ b16[15]);`
197			`nf <= df ? bcsio[15] : resn16;`
198			`zf <= df ? bcsio==16'h0000 : resz16;`
199			`end`
200			`else begin`
201			`acc[7:0] <= df ? bcsio[7:0] : res8[7:0];`
202			`cf <= ~(df ? bcsico8 : resc8);`
203			`vf <= (1'b1 ^ res8[7] ^ b8[7]) & (acc[7] ^ b8[7]);`
204			`nf <= df ? bcsio[7] : resn8;`
205			`zf <= df ? bcsio[7:0]==8'h00 : resz8;`
206			`end`
207	32	robfinch	`end`
208	38	robfinch	`SBC_ZP,`SBC_ZPX,`SBC_IX,`SBC_IY,`SBC_IYL,`SBC_ABS,`SBC_ABSX,`SBC_ABSY,`SBC_I,`SBC_IL,`SBC_AL,`SBC_ALX,`SBC_DSP,`SBC_DSPIY:
209	32	robfinch	`begin`
210	38	robfinch	`if (m16) begin`
211			`acc[15:0] <= df ? bcso : res16[15:0];`
212			`vf <= (1'b1 ^ res16[15] ^ b16[15]) & (acc[15] ^ b16[15]);`
213			`cf <= ~(df ? bcsco : resc16);`
214			`nf <= df ? bcso[15] : resn16;`
215			`zf <= df ? bcso==16'h0000 : resz16;`
216			`end`
217			`else begin`
218			`acc[7:0] <= df ? bcso[7:0] : res8[7:0];`
219			`vf <= (1'b1 ^ res8[7] ^ b8[7]) & (acc[7] ^ b8[7]);`
220			`cf <= ~(df ? bcsco8 : resc8);`
221			`nf <= df ? bcso[7] : resn8;`
222			`zf <= df ? bcso[7:0]==8'h00 : resz8;`
223			`end`
224	32	robfinch	`end`
225	38	robfinch	`CMP_IMM,`CMP_ZP,`CMP_ZPX,`CMP_IX,`CMP_IY,`CMP_IYL,`CMP_ABS,`CMP_ABSX,`CMP_ABSY,`CMP_I,`CMP_IL,`CMP_AL,`CMP_ALX,`CMP_DSP,`CMP_DSPIY:
226			`if (m16) begin cf <= ~resc16; nf <= resn16; zf <= resz16; end else begin cf <= ~resc8; nf <= resn8; zf <= resz8; end`
227	32	robfinch	`CPX_IMM,`CPX_ZP,`CPX_ABS,
228			`CPY_IMM,`CPY_ZP,`CPY_ABS:
229	38	robfinch	`if (xb16) begin cf <= ~resc16; nf <= resn16; zf <= resz16; end else begin cf <= ~resc8; nf <= resn8; zf <= resz8; end`
230	32	robfinch	`BIT_IMM,`BIT_ZP,`BIT_ZPX,`BIT_ABS,`BIT_ABSX:
231	38	robfinch	`if (m16) begin nf <= b16[15]; vf <= b16[14]; zf <= resz16; end else begin nf <= b8[7]; vf <= b8[6]; zf <= resz8; end`
232	32	robfinch	`TRB_ZP,`TRB_ABS,`TSB_ZP,`TSB_ABS:
233	38	robfinch	`if (m16) begin zf <= resz16; end else begin zf <= resz8; end`
234			`LDA_IMM,`LDA_ZP,`LDA_ZPX,`LDA_IX,`LDA_IY,`LDA_IYL,`LDA_ABS,`LDA_ABSX,`LDA_ABSY,`LDA_I,`LDA_IL,`LDA_AL,`LDA_ALX,`LDA_DSP,`LDA_DSPIY,
235			`AND_IMM,`AND_ZP,`AND_ZPX,`AND_IX,`AND_IY,`AND_IYL,`AND_ABS,`AND_ABSX,`AND_ABSY,`AND_I,`AND_IL,`AND_AL,`AND_ALX,`AND_DSP,`AND_DSPIY,
236			`ORA_IMM,`ORA_ZP,`ORA_ZPX,`ORA_IX,`ORA_IY,`ORA_IYL,`ORA_ABS,`ORA_ABSX,`ORA_ABSY,`ORA_I,`ORA_IL,`ORA_AL,`ORA_ALX,`ORA_DSP,`ORA_DSPIY,
237			`EOR_IMM,`EOR_ZP,`EOR_ZPX,`EOR_IX,`EOR_IY,`EOR_IYL,`EOR_ABS,`EOR_ABSX,`EOR_ABSY,`EOR_I,`EOR_IL,`EOR_AL,`EOR_ALX,`EOR_DSP,`EOR_DSPIY:
238			`if (m16) begin acc[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end`
239			`else begin acc[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end`
240			`ASL_ACC: if (m16) begin acc[15:0] <= res16[15:0]; cf <= resc16; nf <= resn16; zf <= resz16; end else begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
241			`ROL_ACC: if (m16) begin acc[15:0] <= res16[15:0]; cf <= resc16; nf <= resn16; zf <= resz16; end else begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
242			`LSR_ACC: if (m16) begin acc[15:0] <= res16[15:0]; cf <= resc16; nf <= resn16; zf <= resz16; end else begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
243			`ROR_ACC: if (m16) begin acc[15:0] <= res16[15:0]; cf <= resc16; nf <= resn16; zf <= resz16; end else begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
244			`ASL_ZP,`ASL_ZPX,`ASL_ABS,`ASL_ABSX: if (m16) begin cf <= resc16; nf <= resn16; zf <= resz16; end else begin cf <= resc8; nf <= resn8; zf <= resz8; end
245			`ROL_ZP,`ROL_ZPX,`ROL_ABS,`ROL_ABSX: if (m16) begin cf <= resc16; nf <= resn16; zf <= resz16; end else begin cf <= resc8; nf <= resn8; zf <= resz8; end
246			`LSR_ZP,`LSR_ZPX,`LSR_ABS,`LSR_ABSX: if (m16) begin cf <= resc16; nf <= resn16; zf <= resz16; end else begin cf <= resc8; nf <= resn8; zf <= resz8; end
247			`ROR_ZP,`ROR_ZPX,`ROR_ABS,`ROR_ABSX: if (m16) begin cf <= resc16; nf <= resn16; zf <= resz16; end else begin cf <= resc8; nf <= resn8; zf <= resz8; end
248			`INC_ZP,`INC_ZPX,`INC_ABS,`INC_ABSX: if (m16) begin nf <= resn16; zf <= resz16; end else begin nf <= resn8; zf <= resz8; end
249			`DEC_ZP,`DEC_ZPX,`DEC_ABS,`DEC_ABSX: if (m16) begin nf <= resn16; zf <= resz16; end else begin nf <= resn8; zf <= resz8; end
250			`PLA: if (m16) begin acc[15:0] <= res16[15:0]; zf <= resz16; nf <= resn16; end else begin acc[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
251			`PLX: if (xb16) begin x[15:0] <= res16[15:0]; zf <= resz16; nf <= resn16; end else begin x[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
252			`PLY: if (xb16) begin y[15:0] <= res16[15:0]; zf <= resz16; nf <= resn16; end else begin y[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
253			`PLB: begin dbr <= res8[7:0]; nf <= resn8; zf <= resz8; end
254			`PLD: begin dpr <= res16[15:0]; nf <= resn16; zf <= resz16; end
255			`LDX_IMM,`LDX_ZP,`LDX_ZPY,`LDX_ABS,`LDX_ABSY: if (xb16) begin x[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end else begin x[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
256			`LDY_IMM,`LDY_ZP,`LDY_ZPX,`LDY_ABS,`LDY_ABSX: if (xb16) begin y[15:0] <= res16[15:0]; nf <= resn16; zf <= resz16; end else begin y[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
257	32	robfinch	`endcase`
258			`end`

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