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// ============================================================================
//        __
//   \\__/ o\    (C) 2013  Robert Finch, Stratford
//    \  __ /    All rights reserved.
//     \/_//     robfinch<remove>@opencores.org
//       ||
//
// This source file is free software: you can redistribute it and/or modify 
// it under the terms of the GNU Lesser General Public License as published 
// by the Free Software Foundation, either version 3 of the License, or     
// (at your option) any later version.                                      
//                                                                          
// This source file is distributed in the hope that it will be useful,      
// but WITHOUT ANY WARRANTY; without even the implied warranty of           
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
// GNU General Public License for more details.                             
//                                                                          
// You should have received a copy of the GNU General Public License        
// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
//                                                                          
// ============================================================================
//
BYTE_IFETCH:
        begin
                vect <= `BYTE_IRQ_VECT;
                vect[31:16] <= abs8[31:16];
                suppress_pcinc <= 4'hF;                         // default: no suppression of increment
                opc <= pc;
                hwi <= `FALSE;
                isBusErr <= `FALSE;
                pg2 <= `FALSE;
                store_what <= `STW_DEF;
                if (nmi_edge & gie) begin
                        ir[7:0] <= `BRK;
                        nmi_edge <= 1'b0;
                        wai <= 1'b0;
                        hwi <= `TRUE;
                        if (nmoi) begin
                                vect <= `NMI_VECT;
                                next_state(DECODE);
                        end
                        else begin
                                vect <= `BYTE_NMI_VECT;
                                vect[31:16] <= abs8[31:16];
                                next_state(BYTE_DECODE);
                        end
                end
                else if (irq_i & gie) begin
                        wai <= 1'b0;
                        if (im) begin
                                if (unCachedInsn) begin
                                        if (bhit) begin
                                                ir <= ibuf;
                                                next_state(BYTE_DECODE);
                                        end
                                        else
                                                state <= LOAD_IBUF1;
                                end
                                else begin
                                        if (ihit) begin
                                                ir <= insn;
                                                next_state(BYTE_DECODE);
                                        end
                                        else
                                                state <= ICACHE1;
                                end
                        end
                        else begin
                                ir[7:0] <= `BRK;
                                hwi <= `TRUE;
                                if (nmoi) begin
                                        vect <= {vbr[31:9],irq_vect,2'b00};
                                        next_state(DECODE);
                                end
                                else begin
                                        next_state(BYTE_DECODE);
                                end
                        end
                end
                else if (!wai) begin
                        if (unCachedInsn) begin
                                if (bhit) begin
                                        ir <= ibuf;
                                        next_state(BYTE_DECODE);
                                end
                                else
                                        state <= LOAD_IBUF1;
                        end
                        else begin
                                if (ihit) begin
                                        ir <= insn;
                                        next_state(BYTE_DECODE);
                                end
                                else
                                        state <= ICACHE1;
                        end
                end
`ifdef DEBUG
                if (hist_capture) begin
                        history_buf[history_ndx] <= pc;
                        history_ndx <= history_ndx+7'd1;
                end
`endif
                case(ir[7:0])
                `TAY,`TXY,`DEY,`INY:    begin y[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `TAX,`TYX,`TSX,`DEX,`INX:       begin x[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `TSA,`TYA,`TXA,`INA,`DEA:       begin acc[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `TAS,`TXS: begin sp <= res8[7:0]; end
                `ADC_IMM:
                        begin
                                acc[7:0] <= df ? bcaio : res8[7:0];
                                cf <= df ? bcaico : resc8;
//                                              vf <= resv8;
                                vf <= (res8[7] ^ b8[7]) & (1'b1 ^ acc[7] ^ b8[7]);
                                nf <= df ? bcaio[7] : resn8;
                                zf <= df ? bcaio==8'h00 : resz8;
                        end
                `ADC_ZP,`ADC_ZPX,`ADC_IX,`ADC_IY,`ADC_ABS,`ADC_ABSX,`ADC_ABSY,`ADC_I:
                        begin
                                acc[7:0] <= df ? bcao : res8[7:0];
                                cf <= df ? bcaco : resc8;
                                vf <= (res8[7] ^ b8[7]) & (1'b1 ^ acc[7] ^ b8[7]);
                                nf <= df ? bcao[7] : resn8;
                                zf <= df ? bcao==8'h00 : resz8;
                        end
                `SBC_IMM:
                        begin
                                acc[7:0] <= df ? bcsio : res8[7:0];
                                cf <= ~(df ? bcsico : resc8);
                                vf <= (1'b1 ^ res8[7] ^ b8[7]) & (acc[7] ^ b8[7]);
                                nf <= df ? bcsio[7] : resn8;
                                zf <= df ? bcsio==8'h00 : resz8;
                        end
                `SBC_ZP,`SBC_ZPX,`SBC_IX,`SBC_IY,`SBC_ABS,`SBC_ABSX,`SBC_ABSY,`SBC_I:
                        begin
                                acc[7:0] <= df ? bcso : res8[7:0];
                                vf <= (1'b1 ^ res8[7] ^ b8[7]) & (acc[7] ^ b8[7]);
                                cf <= ~(df ? bcsco : resc8);
                                nf <= df ? bcso[7] : resn8;
                                zf <= df ? bcso==8'h00 : resz8;
                        end
                `CMP_IMM,`CMP_ZP,`CMP_ZPX,`CMP_IX,`CMP_IY,`CMP_ABS,`CMP_ABSX,`CMP_ABSY,`CMP_I,
                `CPX_IMM,`CPX_ZP,`CPX_ABS,
                `CPY_IMM,`CPY_ZP,`CPY_ABS:
                                begin cf <= ~resc8; nf <= resn8; zf <= resz8; end
                `BIT_IMM,`BIT_ZP,`BIT_ZPX,`BIT_ABS,`BIT_ABSX:
                                begin nf <= b8[7]; vf <= b8[6]; zf <= resz8; end
                `TRB_ZP,`TRB_ABS,`TSB_ZP,`TSB_ABS:
                        begin zf <= resz8; end
                `LDA_IMM,`LDA_ZP,`LDA_ZPX,`LDA_IX,`LDA_IY,`LDA_ABS,`LDA_ABSX,`LDA_ABSY,`LDA_I,
                `AND_IMM,`AND_ZP,`AND_ZPX,`AND_IX,`AND_IY,`AND_ABS,`AND_ABSX,`AND_ABSY,`AND_I,
                `ORA_IMM,`ORA_ZP,`ORA_ZPX,`ORA_IX,`ORA_IY,`ORA_ABS,`ORA_ABSX,`ORA_ABSY,`ORA_I,
                `EOR_IMM,`EOR_ZP,`EOR_ZPX,`EOR_IX,`EOR_IY,`EOR_ABS,`EOR_ABSX,`EOR_ABSY,`EOR_I:
                        begin acc[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `ASL_ACC:       begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
                `ROL_ACC:       begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
                `LSR_ACC:       begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
                `ROR_ACC:       begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
                `ASL_ZP,`ASL_ZPX,`ASL_ABS,`ASL_ABSX: begin cf <= resc8; nf <= resn8; zf <= resz8; end
                `ROL_ZP,`ROL_ZPX,`ROL_ABS,`ROL_ABSX: begin cf <= resc8; nf <= resn8; zf <= resz8; end
                `LSR_ZP,`LSR_ZPX,`LSR_ABS,`LSR_ABSX: begin cf <= resc8; nf <= resn8; zf <= resz8; end
                `ROR_ZP,`ROR_ZPX,`ROR_ABS,`ROR_ABSX: begin cf <= resc8; nf <= resn8; zf <= resz8; end
                `INC_ZP,`INC_ZPX,`INC_ABS,`INC_ABSX: begin nf <= resn8; zf <= resz8; end
                `DEC_ZP,`DEC_ZPX,`DEC_ABS,`DEC_ABSX: begin nf <= resn8; zf <= resz8; end
                `PLA:   begin acc[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
                `PLX:   begin x[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
                `PLY:   begin y[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
                `LDX_IMM,`LDX_ZP,`LDX_ZPY,`LDX_ABS,`LDX_ABSY:   begin x[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                `LDY_IMM,`LDY_ZP,`LDY_ZPX,`LDY_ABS,`LDY_ABSX:   begin y[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
                endcase
        end

Line No.	Rev	Author	Line
1	32	robfinch	`// ============================================================================`
2			`// __`
3			`// \\__/ o\ (C) 2013 Robert Finch, Stratford`
4			`// \ __ / All rights reserved.`
5			`// \/_// robfinch<remove>@opencores.org`
6			`// \|\|`
7			`//`
8			`// This source file is free software: you can redistribute it and/or modify`
9			`// it under the terms of the GNU Lesser General Public License as published`
10			`// by the Free Software Foundation, either version 3 of the License, or`
11			`// (at your option) any later version.`
12			`//`
13			`// This source file is distributed in the hope that it will be useful,`
14			`// but WITHOUT ANY WARRANTY; without even the implied warranty of`
15			`// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
16			`// GNU General Public License for more details.`
17			`//`
18			`// You should have received a copy of the GNU General Public License`
19			`// along with this program. If not, see <http://www.gnu.org/licenses/>.`
20			`//`
21			`// ============================================================================`
22			`//`
23			`BYTE_IFETCH:`
24			`begin`
25			vect <= `BYTE_IRQ_VECT;
26	35	robfinch	`vect[31:16] <= abs8[31:16];`
27	32	robfinch	`suppress_pcinc <= 4'hF; // default: no suppression of increment`
28			`opc <= pc;`
29			hwi <= `FALSE;
30			isBusErr <= `FALSE;
31			pg2 <= `FALSE;
32			store_what <= `STW_DEF;
33	35	robfinch	`if (nmi_edge & gie) begin`
34	32	robfinch	ir[7:0] <= `BRK;
35			`nmi_edge <= 1'b0;`
36			`wai <= 1'b0;`
37			hwi <= `TRUE;
38			`if (nmoi) begin`
39			vect <= `NMI_VECT;
40	35	robfinch	`next_state(DECODE);`
41	32	robfinch	`end`
42			`else begin`
43			vect <= `BYTE_NMI_VECT;
44	35	robfinch	`vect[31:16] <= abs8[31:16];`
45			`next_state(BYTE_DECODE);`
46	32	robfinch	`end`
47			`end`
48			`else if (irq_i & gie) begin`
49			`wai <= 1'b0;`
50			`if (im) begin`
51			`if (unCachedInsn) begin`
52			`if (bhit) begin`
53			`ir <= ibuf;`
54	35	robfinch	`next_state(BYTE_DECODE);`
55	32	robfinch	`end`
56			`else`
57			`state <= LOAD_IBUF1;`
58			`end`
59			`else begin`
60			`if (ihit) begin`
61			`ir <= insn;`
62	35	robfinch	`next_state(BYTE_DECODE);`
63	32	robfinch	`end`
64			`else`
65			`state <= ICACHE1;`
66			`end`
67			`end`
68			`else begin`
69			ir[7:0] <= `BRK;
70			hwi <= `TRUE;
71			`if (nmoi) begin`
72			`vect <= {vbr[31:9],irq_vect,2'b00};`
73	35	robfinch	`next_state(DECODE);`
74	32	robfinch	`end`
75			`else begin`
76	35	robfinch	`next_state(BYTE_DECODE);`
77	32	robfinch	`end`
78			`end`
79			`end`
80			`else if (!wai) begin`
81			`if (unCachedInsn) begin`
82			`if (bhit) begin`
83			`ir <= ibuf;`
84	35	robfinch	`next_state(BYTE_DECODE);`
85	32	robfinch	`end`
86			`else`
87			`state <= LOAD_IBUF1;`
88			`end`
89			`else begin`
90			`if (ihit) begin`
91			`ir <= insn;`
92	35	robfinch	`next_state(BYTE_DECODE);`
93	32	robfinch	`end`
94			`else`
95			`state <= ICACHE1;`
96			`end`
97			`end`
98	35	robfinch	`ifdef DEBUG
99	32	robfinch	`if (hist_capture) begin`
100			`history_buf[history_ndx] <= pc;`
101			`history_ndx <= history_ndx+7'd1;`
102			`end`
103	35	robfinch	`endif
104	32	robfinch	`case(ir[7:0])`
105	35	robfinch	`TAY,`TXY,`DEY,`INY: begin y[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
106			`TAX,`TYX,`TSX,`DEX,`INX: begin x[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
107			`TSA,`TYA,`TXA,`INA,`DEA: begin acc[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
108	32	robfinch	`TAS,`TXS: begin sp <= res8[7:0]; end
109			`ADC_IMM:
110			`begin`
111	35	robfinch	`acc[7:0] <= df ? bcaio : res8[7:0];`
112	32	robfinch	`cf <= df ? bcaico : resc8;`
113			`// vf <= resv8;`
114			`vf <= (res8[7] ^ b8[7]) & (1'b1 ^ acc[7] ^ b8[7]);`
115			`nf <= df ? bcaio[7] : resn8;`
116			`zf <= df ? bcaio==8'h00 : resz8;`
117			`end`
118			`ADC_ZP,`ADC_ZPX,`ADC_IX,`ADC_IY,`ADC_ABS,`ADC_ABSX,`ADC_ABSY,`ADC_I:
119			`begin`
120	35	robfinch	`acc[7:0] <= df ? bcao : res8[7:0];`
121	32	robfinch	`cf <= df ? bcaco : resc8;`
122			`vf <= (res8[7] ^ b8[7]) & (1'b1 ^ acc[7] ^ b8[7]);`
123			`nf <= df ? bcao[7] : resn8;`
124			`zf <= df ? bcao==8'h00 : resz8;`
125			`end`
126			`SBC_IMM:
127			`begin`
128	35	robfinch	`acc[7:0] <= df ? bcsio : res8[7:0];`
129	32	robfinch	`cf <= ~(df ? bcsico : resc8);`
130			`vf <= (1'b1 ^ res8[7] ^ b8[7]) & (acc[7] ^ b8[7]);`
131			`nf <= df ? bcsio[7] : resn8;`
132			`zf <= df ? bcsio==8'h00 : resz8;`
133			`end`
134			`SBC_ZP,`SBC_ZPX,`SBC_IX,`SBC_IY,`SBC_ABS,`SBC_ABSX,`SBC_ABSY,`SBC_I:
135			`begin`
136	35	robfinch	`acc[7:0] <= df ? bcso : res8[7:0];`
137	32	robfinch	`vf <= (1'b1 ^ res8[7] ^ b8[7]) & (acc[7] ^ b8[7]);`
138			`cf <= ~(df ? bcsco : resc8);`
139			`nf <= df ? bcso[7] : resn8;`
140			`zf <= df ? bcso==8'h00 : resz8;`
141			`end`
142			`CMP_IMM,`CMP_ZP,`CMP_ZPX,`CMP_IX,`CMP_IY,`CMP_ABS,`CMP_ABSX,`CMP_ABSY,`CMP_I,
143			`CPX_IMM,`CPX_ZP,`CPX_ABS,
144			`CPY_IMM,`CPY_ZP,`CPY_ABS:
145			`begin cf <= ~resc8; nf <= resn8; zf <= resz8; end`
146			`BIT_IMM,`BIT_ZP,`BIT_ZPX,`BIT_ABS,`BIT_ABSX:
147			`begin nf <= b8[7]; vf <= b8[6]; zf <= resz8; end`
148			`TRB_ZP,`TRB_ABS,`TSB_ZP,`TSB_ABS:
149			`begin zf <= resz8; end`
150			`LDA_IMM,`LDA_ZP,`LDA_ZPX,`LDA_IX,`LDA_IY,`LDA_ABS,`LDA_ABSX,`LDA_ABSY,`LDA_I,
151			`AND_IMM,`AND_ZP,`AND_ZPX,`AND_IX,`AND_IY,`AND_ABS,`AND_ABSX,`AND_ABSY,`AND_I,
152			`ORA_IMM,`ORA_ZP,`ORA_ZPX,`ORA_IX,`ORA_IY,`ORA_ABS,`ORA_ABSX,`ORA_ABSY,`ORA_I,
153			`EOR_IMM,`EOR_ZP,`EOR_ZPX,`EOR_IX,`EOR_IY,`EOR_ABS,`EOR_ABSX,`EOR_ABSY,`EOR_I:
154	35	robfinch	`begin acc[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end`
155			`ASL_ACC: begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
156			`ROL_ACC: begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
157			`LSR_ACC: begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
158			`ROR_ACC: begin acc[7:0] <= res8[7:0]; cf <= resc8; nf <= resn8; zf <= resz8; end
159	32	robfinch	`ASL_ZP,`ASL_ZPX,`ASL_ABS,`ASL_ABSX: begin cf <= resc8; nf <= resn8; zf <= resz8; end
160			`ROL_ZP,`ROL_ZPX,`ROL_ABS,`ROL_ABSX: begin cf <= resc8; nf <= resn8; zf <= resz8; end
161			`LSR_ZP,`LSR_ZPX,`LSR_ABS,`LSR_ABSX: begin cf <= resc8; nf <= resn8; zf <= resz8; end
162			`ROR_ZP,`ROR_ZPX,`ROR_ABS,`ROR_ABSX: begin cf <= resc8; nf <= resn8; zf <= resz8; end
163			`INC_ZP,`INC_ZPX,`INC_ABS,`INC_ABSX: begin nf <= resn8; zf <= resz8; end
164			`DEC_ZP,`DEC_ZPX,`DEC_ABS,`DEC_ABSX: begin nf <= resn8; zf <= resz8; end
165	35	robfinch	`PLA: begin acc[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
166			`PLX: begin x[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
167			`PLY: begin y[7:0] <= res8[7:0]; zf <= resz8; nf <= resn8; end
168			`LDX_IMM,`LDX_ZP,`LDX_ZPY,`LDX_ABS,`LDX_ABSY: begin x[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
169			`LDY_IMM,`LDY_ZP,`LDY_ZPX,`LDY_ABS,`LDY_ABSX: begin y[7:0] <= res8[7:0]; nf <= resn8; zf <= resz8; end
170	32	robfinch	`endcase`
171			`end`

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[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [byte_ifetch.v] - Blame information for rev 35