URL https://opencores.org/ocsvn/rtf65002/rtf65002/trunk

Subversion Repositories rtf65002

[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [byte_jsr.v] - Blame information for rev 5

Line No.	Rev	Author	Line
1	5	robfinch	`BYTE_JSR1:`
2			`if (ack_i) begin`
3			`cyc_o <= 1'b0;`
4			`stb_o <= 1'b0;`
5			`we_o <= 1'b0;`
6			`sel_o <= 4'h0;`
7			`if (dhit) begin`
8			`wrsel <= sel_o;`
9			`wr <= 1'b1;`
10			`end`
11			`state <= BYTE_JSR2;`
12			`end`
13			`BYTE_JSR2:`
14			`begin`
15			`radr <= {24'h1,sp[7:2]};`
16			`wadr <= {24'h1,sp[7:2]};`
17			`radr2LSB <= sp[1:0];`
18			`wadr2LSB <= sp[1:0];`
19			`wdat <= {4{pcp2[7:0]}};`
20			`cyc_o <= 1'b1;`
21			`stb_o <= 1'b1;`
22			`we_o <= 1'b1;`
23			`case(sp[1:0])`
24			`2'd0: sel_o <= 4'b0001;`
25			`2'd1: sel_o <= 4'b0010;`
26			`2'd2: sel_o <= 4'b0100;`
27			`2'd3: sel_o <= 4'b1000;`
28			`endcase`
29			`adr_o <= {24'h1,sp[7:2],2'b00};`
30			`dat_o <= {4{pcp2[7:0]}};`
31			`sp <= sp_dec;`
32			`state <= BYTE_JSR3;`
33			`end`
34			`BYTE_JSR3:`
35			`if (ack_i) begin`
36			`cyc_o <= 1'b0;`
37			`stb_o <= 1'b0;`
38			`we_o <= 1'b0;`
39			`sel_o <= 4'h0;`
40			`pc[15:0] <= ir[23:8];`
41			`if (dhit) begin`
42			`wrsel <= sel_o;`
43			`wr <= 1'b1;`
44			`end`
45			`state <= IFETCH;`
46			`end`