URL https://opencores.org/ocsvn/rtf65002/rtf65002/trunk

Subversion Repositories rtf65002

[/] [rtf65002/] [trunk/] [software/] [asm/] [ethernet.asm] - Blame information for rev 40

Details | Compare with Previous | View Log


 
; ============================================================================
;        __
;   \\__/ o\    (C) 2014  Robert Finch, Stratford
;    \  __ /    All rights reserved.
;     \/_//     robfinch@opencores.org
;       ||
;
;
; This source file is free software: you can redistribute it and/or modify
; it under the terms of the GNU Lesser General Public License as published
; by the Free Software Foundation, either version 3 of the License, or
; (at your option) any later version.
;
; This source file is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program.  If not, see .
;
; ============================================================================
;
;==============================================================================
; Ethernet test code
;==============================================================================
my_MAC1 EQU     0x00
my_MAC2 EQU     0xFF
my_MAC3 EQU     0xEE
my_MAC4 EQU     0xF0
my_MAC5 EQU     0xDA
my_MAC6 EQU     0x42
 
; r1 = PHY
; r2 = regnum
; r3 = data
;
eth_mii_write:
        pha
        phx
        push    r4
        ld              r4,#ETHMAC
        asl             r2,r2,#8
        or              r1,r1,r2
        sta             ETH_MIIADDRESS,r4
        sty             ETH_MIITX_DATA,r4
        lda             #ETH_WCTRLDATA
        sta             ETH_MIICOMMAND,r4
        stz             ETH_MIICOMMAND,r4
emiw1:
        lda             ETH_MIISTATUS,r4
        bit             #ETH_MIISTATUS_BUSY
        bne             emiw1
        pop             r4
        plx
        pla
        rts
 
; r1 = PHY
; r2 = reg
 
eth_mii_read:
        phx
        phy
        ldy             #ETHMAC
        asl             r2,r2,#8
        or              r1,r1,r2
        sta             ETH_MIIADDRESS,y
        lda             #ETH_MIICOMMAND_RSTAT
        sta             ETH_MIICOMMAND,y
        stz             ETH_MIICOMMAND,y
emir1:
        lda             ETH_MIISTATUS,y
        bit             #ETH_MIISTATUS_BUSY
        bne             emir1
        lda             ETH_MIIRX_DATA,y
        ply
        plx
        rts
 
public ethmac_setup:
        ld              r4,#ETHMAC
        lda             #ETH_MIIMODER_RST
        sta             ETH_MIIMODER,r4
        lda             ETH_MIIMODER,r4
        and             #~ETH_MIIMODER_RST
        sta             ETH_MIIMODER,r4
        lda             #$10                            ; /16=1.25MHz
        sta             ETH_MIIMODER,r4         ; Clock divider for MII Management interface
        lda             #ETH_MODER_RST
        sta             ETH_MODER,r4
        lda             ETH_MODER,r4
        and             #~ETH_MODER_RST
        sta             ETH_MODER,r4
 
        stz             ETH_MIITX_DATA,r4
        stz             ETH_MIIADDRESS,r4
        stz             ETH_MIICOMMAND,r4
 
        lda             #0xEEF0DA42
        sta             ETH_MAC_ADDR0,r4                ; MAC0
        lda             #0x00FF
        sta             ETH_MAC_ADDR1,r4                ; MAC1
 
        lda             #-1
        sta             ETH_INT_SOURCE,r4
 
        ; Advertise support for 10/100 FD/HD
        lda             #ETH_PHY
        ldx             #ETH_MII_ADVERTISE
        jsr             eth_mii_read
        or              r3,r1,#ETH_ADVERTISE_ALL
        lda             #ETH_PHY
        ldx             #ETH_MII_ADVERTISE
        jsr             eth_mii_write
 
        ; Do NOT advertise support for 1000BT
        lda             #ETH_PHY
        ldx             #ETH_MII_CTRL1000
        jsr             eth_mii_read
        and             r3,r1,#~(ETH_ADVERTISE_1000FULL|ETH_ADVERTISE_1000HALF)
        lda             #ETH_PHY
        ldx             #ETH_MII_CTRL1000
        jsr             eth_mii_write
 
        ; Disable 1000BT
        lda             #ETH_PHY
        ldx             #ETH_MII_EXPANSION
        jsr             eth_mii_read
        and             r3,r1,#~(ETH_ESTATUS_1000_THALF|ETH_ESTATUS_1000_TFULL)
        ldx             #ETH_MII_EXPANSION
        jsr             eth_mii_write
 
        ; Restart autonegotiation
        lda             #0
        ldx             #ETH_MII_BMCR
        jsr             eth_mii_read
        and             r3,r1,#~(ETH_BMCR_ANRESTART|ETH_BMCR_ANENABLE)
        lda             #7
        jsr             eth_mii_write
 
        ; Enable BOTH the transmiter and receiver
        lda             #$A003
        sta             ETH_MODER,r4
        rts
 
; Initialize the ethmac controller.
; Supply a MAC address, set MD clock
;
message "eth_init"
public eth_init:
        pha
        phy
        ldy             #ETHMAC
        lda             #$A003
        sta             ETH_MODER,y
;       lda             #0x64                           ; 100
;       sta             ETH_MIIMODER,y
;       lda             #7                                      ; PHY address
;       sta             ETH_MIIADDRESS,y
        lda             #0xEEF0DA42
        sta             ETH_MAC_ADDR0,y         ; MAC0
        lda             #0x00FF
        sta             ETH_MAC_ADDR1,y         ; MAC1
        ply
        pla
        rts
 
; Request a packet and display on screen
; r1 = address where to put packet
;
message "eth_request_packet"
public eth_request_packet:
        phx
        phy
        push    r4
        push    r5
        ldy             #ETHMAC
        ldx             #4                                      ; clear rx interrupt
        stx             ETH_INT_SOURCE,y
        sta             0x181,y                         ; storage address
        ldx             #0xe000                         ; enable interrupt
        stx             0x180,y
eth1:
        nop
        ldx             ETH_INT_SOURCE,y
        bit             r2,#4                           ; get bit #2
        beq             eth1
        ldx             0x180,y                         ; get from descriptor
        lsr             r2,r2,#16
        ldy             #0
        pha
        jsr             GetScreenLocation
        add             r4,r1,3780                      ; second last line of screen
        pla
eth20:
        add             r5,r1,r3
        lb              r2,0,r5                         ; get byte
        add             r5,r4,r3
        stx             (r5)                            ; store to screen
        iny
        cpy             #83
        bne             eth20
        pop             r5
        pop             r4
        ply
        plx
        rts
 
; r1 = packet address
;
message "eth_interpret_packet"
public eth_interpret_packet:
        phx
        phy
        lb              r2,12,r1
        lb              r3,13,r1
        cpx             #8                                      ; 0x806 ?
        bne             eth2
        cpy             #6
        bne             eth2
        lda             #2                                      ; return r1 = 2 for ARP
eth5:
        ply
        plx
        rts
eth2:
        cpx             #8
        bne             eth3                            ; 0x800 ?
        cpy             #0
        bne             eth3
        lb              r2,23,r1
        cpx             #1
        bne             eth4
        lda             #1
        bra             eth5                            ; return 1 ICMP
eth4:
        cpx             #$11
        bne             eth6
        lda             #3                                      ; return 3 for UDP
        bra             eth5
eth6:
        cpx             #6
        bne             eth7
        lda             #4                                      ; return 4 for TCP
        bra             eth5
eth7:
eth3:
        eor             r1,r1,r1                        ; return zero for unknown
        ply
        plx
        rts
 
; r1 = address of packet to send
; r2 = packet length
;
message "eth_send_packet"
public eth_send_packet:
        phx
        phy
        push    r4
        ldy             #ETHMAC
        ; wait for tx buffer to be clear
eth8:
        ld              r4,0x100,y
        bit             r4,#$8000
        bne             eth8
        ld              r4,#1                   ; clear tx interrupt
        st              r4,ETH_INT_SOURCE,y
        ; set address
        sta             0x101,y
        ; set the packet length field and enable interrupts
        asl             r2,r2,#16
        or              r2,r2,#0xF000
        stx             0x100,y
        pop             r4
        ply
        plx
        rts
 
; Only for IP type packets (not ARP)
; r1 = rx buffer address
; r2 = swap flag
; Returns:
; r1 = data start index
;
message "eth_build_packet"
public eth_build_packet:
        phy
        push    r4
        push    r5
        push    r6
        push    r7
        push    r8
        push    r9
        push    r10
 
        lb              r3,6,r1
        lb              r4,7,r1
        lb              r5,8,r1
        lb              r6,9,r1
        lb              r7,10,r1
        lb              r8,11,r1
        ; write to destination header
        sb              r3,0,r1
        sb              r4,1,r1
        sb              r5,2,r1
        sb              r6,3,r1
        sb              r7,4,r1
        sb              r8,5,r1
        ; write to source header
        ld              r3,#my_MAC1
        sb              r3,6,r1
        ld              r3,#my_MAC2
        sb              r3,7,r1
        ld              r3,#my_MAC3
        sb              r3,8,r1
        ld              r3,#my_MAC4
        sb              r3,9,r1
        ld              r3,#my_MAC5
        sb              r3,10,r1
        ld              r3,#my_MAC6
        sb              r3,11,r1
        cmp             r2,#1
        bne             eth16                   ; if (swap)
        lb              r3,26,r1
        lb              r4,27,r1
        lb              r5,28,r1
        lb              r6,29,r1
        ; read destination
        lb              r7,30,r1
        lb              r8,31,r1
        lb              r9,32,r1
        lb              r10,33,r1
        ; write to sender
        sb              r7,26,r1
        sb              r8,27,r1
        sb              r9,28,r1
        sb              r10,29,r1
        ; write destination
        sb              r3,30,r1
        sb              r4,31,r1
        sb              r5,32,r1
        sb              r6,33,r1
eth16:
        ldy             eth_unique_id
        iny
        sty             eth_unique_id
        sb              r3,19,r1
        lsr             r3,r3,#8
        sb              r3,18,r1
        lb              r3,14,r1
        and             r3,r3,#0xF
        asl             r3,r3,#2                ; *4
        add             r1,r3,#14               ; return datastart in r1
        pop             r10
        pop             r9
        pop             r8
        pop             r7
        pop             r6
        pop             r5
        pop             r4
        ply
        rts
 
; Compute IPv4 checksum of header
; r1 = packet address
; r2 = data start
;
message "eth_checksum"
public eth_checksum:
        phy
        push    r4
        push    r5
        push    r6
        ; set checksum to zero
        stz             24,r1
        stz             25,r1
        eor             r3,r3,r3                ; r3 = sum = zero
        ld              r4,#14
eth15:
        ld              r5,r2
        dec             r5                              ; r5 = datastart - 1
        cmp             r4,r5
        bpl             eth14
        add             r6,r1,r4
        lb              r5,0,r6                 ; shi = [rx_addr+i]
        lb              r6,1,r6             ; slo = [rx_addr+i+1]
        asl     r5,r5,#8
        or              r5,r5,r6                ; shilo
        add             r3,r3,r5                ; sum = sum + shilo
        add             r4,r4,#2                ; i = i + 2
        bra             eth15
eth14:
        ld              r5,r3                   ; r5 = sum
        and             r3,r3,#0xffff
        lsr             r5,r5,#16
        add             r3,r3,r5
        eor             r3,r3,#-1
        sb              r3,25,r1                ; low byte
        lsr             r3,r3,#8
        sb              r3,24,r1                ; high byte
        pop             r6
        pop             r5
        pop             r4
        ply
        rts
 
; r1 = packet address
; returns r1 = 1 if this IP
;
message "eth_verifyIP"
public eth_verifyIP:
        phx
        phy
        push    r4
        push    r5
        lb              r2,30,r1
        lb              r3,31,r1
        lb              r4,32,r1
        lb              r5,33,r1
        ; Check for general broadcast
        cmp             r2,#$FF
        bne             eth11
        cmp             r3,#$FF
        bne             eth11
        cmp             r4,#$FF
        bne             eth11
        cmp             r5,#$FF
        bne             eth11
eth12:
        lda             #1
eth13:
        pop             r5
        pop             r4
        ply
        plx
        rts
eth11:
        ld              r1,r2
        asl             r1,r1,#8
        or              r1,r1,r3
        asl             r1,r1,#8
        or              r1,r1,r4
        asl             r1,r1,#8
        or              r1,r1,r5
        cmp             #$C0A8012A              ; 192.168.1.42
        beq             eth12
        eor             r1,r1,r1
        bra             eth13
 
msgEthTest
        db              CR,LF,"Ethernet test - press CTRL-C to exit.",CR,LF,0
 
message "eth_main"
public eth_main:
        jsr             RequestIOFocus
        jsr             ClearScreen
        jsr             HomeCursor
        lda             #msgEthTest
        jsr             DisplayStringB
;       jsr             eth_init
        jsr             ethmac_setup
eth_loop:
        jsr             KeybdGetChar
        cmp             #-1
        beq             eth17
        cmp             #CTRLC
        bne             eth17
        lda             #$A000                                  ; tunr off transmit/recieve
        sta             ETH_MODER+ETHMAC
        jsr             ReleaseIOFocus
        rts
eth17
        lda             #eth_rx_buffer<<2               ; memory address zero
        jsr             eth_request_packet
        jsr             eth_interpret_packet    ; r1 = packet type
 
        cmp             #1
        bne             eth10
        ld              r2,r1                                   ; save off r1, r2 = packet type
        lda             #eth_rx_buffer<<2               ; memory address zero
        jsr             eth_verifyIP
        tay
        txa                                                             ; r1 = packet type again
        cpy             #1
        bne             eth10
 
        lda             #eth_rx_buffer<<2               ; memory address zero
        ldx             #1
        jsr             eth_build_packet
        tay                                                             ; y = icmpstart
        lda             #eth_rx_buffer<<2               ; memory address zero
        add             r4,r1,r3
        sb              r0,0,r4                                 ; [rx_addr+icmpstart] = 0
        lb              r2,17,r1
        add             r2,r2,#14                               ; r2 = len
        ld              r6,r2                                   ; r6 = len
        add             r15,r1,r3
        lb              r4,2,r15                                ; shi
        lb              r5,3,r15                                ; slo
        asl             r4,r4,#8
        or              r4,r4,r5                                ; sum = {shi,slo};
        eor             r4,r4,#-1                               ; sum = ~sum
        sub             r4,r4,#0x800                    ; sum = sum - 0x800
        eor             r4,r4,#-1                               ; sum = ~sum
        add             r15,r1,r3
        sb              r4,3,r15
        lsr             r4,r4,#8
        sb              r4,2,r15
        tyx
        jsr             eth_checksum
        lda             #eth_rx_buffer<<2               ; memory address zero
        ld              r2,r6
        jsr             eth_send_packet
        jmp             eth_loop
eth10:
        ; r2 = rx_addr
        cmp             #2
        bne             eth_loop                ; Do we have ARP ?
;       xor             r2,r2,r2                        ; memory address zero
        ldx             #eth_rx_buffer<<2
        ; get the opcode
        lb              r13,21,x
        cmp             r13,#1
        bne             eth_loop                ; ARP request
        ; get destination IP address
        lb              r9,38,x
        lb              r10,39,x
        lb              r11,40,x
        lb              r12,41,x
        ; set r15 = destination IP
        ld              r15,r9
        asl             r15,r15,#8
        or              r15,r15,r10
        asl             r15,r15,#8
        or              r15,r15,r11
        asl             r15,r15,#8
        or              r15,r15,r12
        ; Is it our IP ?
        cmp             r15,#$C0A8012A  ; //192.168.1.42
        bne             eth_loop
        ; get source IP address
        lb              r5,28,x
        lb              r6,29,x
        lb              r7,30,x
        lb              r8,31,x
        ; set r14 = source IP
        ld              r14,r5
        asl             r14,r14,#8
        or              r14,r14,r6
        asl             r14,r14,#8
        or              r14,r14,r7
        asl             r14,r14,#8
        or              r14,r14,r8
        ; Get the source MAC address
        push    r6
        push    r7
        push    r8
        push    r9
        push    r10
        push    r11
        lb              r6,22,x
        lb              r7,23,x
        lb              r8,24,x
        lb              r9,25,x
        lb              r10,26,x
        lb              r11,27,x
        ; write to destination header
        sb              r6,0,x
        sb              r7,1,x
        sb              r8,2,x
        sb              r9,3,x
        sb              r10,4,x
        sb              r11,5,x
        ; and write to ARP destination
        sb              r6,32,x
        sb              r7,33,x
        sb              r8,34,x
        sb              r9,35,x
        sb              r10,36,x
        sb              r11,37,x
        pop             r11
        pop             r10
        pop             r9
        pop             r8
        pop             r7
        pop             r6
        ; write to source header
;       stbc    #0x00,6[r2]
;       stbc    #0xFF,7[r2]
;       stbc    #0xEE,8[r2]
;       stbc    #0xF0,9[r2]
;       stbc    #0xDA,10[r2]
;       stbc    #0x42,11[r2]
        sb              r0,6,x
        lda             #0xFF
        sb              r1,7,x
        lda             #0xEE
        sb              r1,8,x
        lda             #0xF0
        sb              r1,9,x
        lda             #0xDA
        sb              r1,10,x
        lda             #0x42
        sb              r1,11,x
        ; write to ARP source
;       stbc    #0x00,22[r2]
;       stbc    #0xFF,23[r2]
;       stbc    #0xEE,24[r2]
;       stbc    #0xF0,25[r2]
;       stbc    #0xDA,26[r2]
;       stbc    #0x42,27[r2]
        sb              r0,22,x
        lda             #0xFF
        sb              r1,23,x
        lda             #0xEE
        sb              r1,24,x
        lda             #0xF0
        sb              r1,25,x
        lda             #0xDA
        sb              r1,26,x
        lda             #0x42
        sb              r1,27,x
        ; swap sender / destination IP
        ; write sender
        sb              r9,28,x
        sb              r10,29,x
        sb              r11,30,x
        sb              r12,31,x
        ; write destination
        sb              r5,38,x
        sb              r6,39,x
        sb              r7,40,x
        sb              r8,41,x
        ; change request to reply
;       stbc    #2,21[r2]
        lda             #2
        sb              r1,21,x
        txa                                             ; r1 = packet address
        ldx             #0x2A                   ; r2 = packet length
        jsr             eth_send_packet
        jmp             eth_loop
 

Browse

Tools

Subversion Repositories rtf65002

[/] [rtf65002/] [trunk/] [software/] [asm/] [ethernet.asm] - Blame information for rev 40

Line No.	Rev	Author	Line
1	40	robfinch
2			`; ============================================================================`
3			`; __`
4			`; \\__/ o\ (C) 2014 Robert Finch, Stratford`
5			`; \ __ / All rights reserved.`
6			`; \/_// robfinch@opencores.org`
7			`; \|\|`
8			`;`
9			`;`
10			`; This source file is free software: you can redistribute it and/or modify`
11			`; it under the terms of the GNU Lesser General Public License as published`
12			`; by the Free Software Foundation, either version 3 of the License, or`
13			`; (at your option) any later version.`
14			`;`
15			`; This source file is distributed in the hope that it will be useful,`
16			`; but WITHOUT ANY WARRANTY; without even the implied warranty of`
17			`; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
18			`; GNU General Public License for more details.`
19			`;`
20			`; You should have received a copy of the GNU General Public License`
21			`; along with this program. If not, see .`
22			`;`
23			`; ============================================================================`
24			`;`
25			`;==============================================================================`
26			`; Ethernet test code`
27			`;==============================================================================`
28			`my_MAC1 EQU 0x00`
29			`my_MAC2 EQU 0xFF`
30			`my_MAC3 EQU 0xEE`
31			`my_MAC4 EQU 0xF0`
32			`my_MAC5 EQU 0xDA`
33			`my_MAC6 EQU 0x42`
34
35			`; r1 = PHY`
36			`; r2 = regnum`
37			`; r3 = data`
38			`;`
39			`eth_mii_write:`
40			`pha`
41			`phx`
42			`push r4`
43			`ld r4,#ETHMAC`
44			`asl r2,r2,#8`
45			`or r1,r1,r2`
46			`sta ETH_MIIADDRESS,r4`
47			`sty ETH_MIITX_DATA,r4`
48			`lda #ETH_WCTRLDATA`
49			`sta ETH_MIICOMMAND,r4`
50			`stz ETH_MIICOMMAND,r4`
51			`emiw1:`
52			`lda ETH_MIISTATUS,r4`
53			`bit #ETH_MIISTATUS_BUSY`
54			`bne emiw1`
55			`pop r4`
56			`plx`
57			`pla`
58			`rts`
59
60			`; r1 = PHY`
61			`; r2 = reg`
62
63			`eth_mii_read:`
64			`phx`
65			`phy`
66			`ldy #ETHMAC`
67			`asl r2,r2,#8`
68			`or r1,r1,r2`
69			`sta ETH_MIIADDRESS,y`
70			`lda #ETH_MIICOMMAND_RSTAT`
71			`sta ETH_MIICOMMAND,y`
72			`stz ETH_MIICOMMAND,y`
73			`emir1:`
74			`lda ETH_MIISTATUS,y`
75			`bit #ETH_MIISTATUS_BUSY`
76			`bne emir1`
77			`lda ETH_MIIRX_DATA,y`
78			`ply`
79			`plx`
80			`rts`
81
82			`public ethmac_setup:`
83			`ld r4,#ETHMAC`
84			`lda #ETH_MIIMODER_RST`
85			`sta ETH_MIIMODER,r4`
86			`lda ETH_MIIMODER,r4`
87			`and #~ETH_MIIMODER_RST`
88			`sta ETH_MIIMODER,r4`
89			`lda #$10 ; /16=1.25MHz`
90			`sta ETH_MIIMODER,r4 ; Clock divider for MII Management interface`
91			`lda #ETH_MODER_RST`
92			`sta ETH_MODER,r4`
93			`lda ETH_MODER,r4`
94			`and #~ETH_MODER_RST`
95			`sta ETH_MODER,r4`
96
97			`stz ETH_MIITX_DATA,r4`
98			`stz ETH_MIIADDRESS,r4`
99			`stz ETH_MIICOMMAND,r4`
100
101			`lda #0xEEF0DA42`
102			`sta ETH_MAC_ADDR0,r4 ; MAC0`
103			`lda #0x00FF`
104			`sta ETH_MAC_ADDR1,r4 ; MAC1`
105
106			`lda #-1`
107			`sta ETH_INT_SOURCE,r4`
108
109			`; Advertise support for 10/100 FD/HD`
110			`lda #ETH_PHY`
111			`ldx #ETH_MII_ADVERTISE`
112			`jsr eth_mii_read`
113			`or r3,r1,#ETH_ADVERTISE_ALL`
114			`lda #ETH_PHY`
115			`ldx #ETH_MII_ADVERTISE`
116			`jsr eth_mii_write`
117
118			`; Do NOT advertise support for 1000BT`
119			`lda #ETH_PHY`
120			`ldx #ETH_MII_CTRL1000`
121			`jsr eth_mii_read`
122			`and r3,r1,#~(ETH_ADVERTISE_1000FULL\|ETH_ADVERTISE_1000HALF)`
123			`lda #ETH_PHY`
124			`ldx #ETH_MII_CTRL1000`
125			`jsr eth_mii_write`
126
127			`; Disable 1000BT`
128			`lda #ETH_PHY`
129			`ldx #ETH_MII_EXPANSION`
130			`jsr eth_mii_read`
131			`and r3,r1,#~(ETH_ESTATUS_1000_THALF\|ETH_ESTATUS_1000_TFULL)`
132			`ldx #ETH_MII_EXPANSION`
133			`jsr eth_mii_write`
134
135			`; Restart autonegotiation`
136			`lda #0`
137			`ldx #ETH_MII_BMCR`
138			`jsr eth_mii_read`
139			`and r3,r1,#~(ETH_BMCR_ANRESTART\|ETH_BMCR_ANENABLE)`
140			`lda #7`
141			`jsr eth_mii_write`
142
143			`; Enable BOTH the transmiter and receiver`
144			`lda #$A003`
145			`sta ETH_MODER,r4`
146			`rts`
147
148			`; Initialize the ethmac controller.`
149			`; Supply a MAC address, set MD clock`
150			`;`
151			`message "eth_init"`
152			`public eth_init:`
153			`pha`
154			`phy`
155			`ldy #ETHMAC`
156			`lda #$A003`
157			`sta ETH_MODER,y`
158			`; lda #0x64 ; 100`
159			`; sta ETH_MIIMODER,y`
160			`; lda #7 ; PHY address`
161			`; sta ETH_MIIADDRESS,y`
162			`lda #0xEEF0DA42`
163			`sta ETH_MAC_ADDR0,y ; MAC0`
164			`lda #0x00FF`
165			`sta ETH_MAC_ADDR1,y ; MAC1`
166			`ply`
167			`pla`
168			`rts`
169
170			`; Request a packet and display on screen`
171			`; r1 = address where to put packet`
172			`;`
173			`message "eth_request_packet"`
174			`public eth_request_packet:`
175			`phx`
176			`phy`
177			`push r4`
178			`push r5`
179			`ldy #ETHMAC`
180			`ldx #4 ; clear rx interrupt`
181			`stx ETH_INT_SOURCE,y`
182			`sta 0x181,y ; storage address`
183			`ldx #0xe000 ; enable interrupt`
184			`stx 0x180,y`
185			`eth1:`
186			`nop`
187			`ldx ETH_INT_SOURCE,y`
188			`bit r2,#4 ; get bit #2`
189			`beq eth1`
190			`ldx 0x180,y ; get from descriptor`
191			`lsr r2,r2,#16`
192			`ldy #0`
193			`pha`
194			`jsr GetScreenLocation`
195			`add r4,r1,3780 ; second last line of screen`
196			`pla`
197			`eth20:`
198			`add r5,r1,r3`
199			`lb r2,0,r5 ; get byte`
200			`add r5,r4,r3`
201			`stx (r5) ; store to screen`
202			`iny`
203			`cpy #83`
204			`bne eth20`
205			`pop r5`
206			`pop r4`
207			`ply`
208			`plx`
209			`rts`
210
211			`; r1 = packet address`
212			`;`
213			`message "eth_interpret_packet"`
214			`public eth_interpret_packet:`
215			`phx`
216			`phy`
217			`lb r2,12,r1`
218			`lb r3,13,r1`
219			`cpx #8 ; 0x806 ?`
220			`bne eth2`
221			`cpy #6`
222			`bne eth2`
223			`lda #2 ; return r1 = 2 for ARP`
224			`eth5:`
225			`ply`
226			`plx`
227			`rts`
228			`eth2:`
229			`cpx #8`
230			`bne eth3 ; 0x800 ?`
231			`cpy #0`
232			`bne eth3`
233			`lb r2,23,r1`
234			`cpx #1`
235			`bne eth4`
236			`lda #1`
237			`bra eth5 ; return 1 ICMP`
238			`eth4:`
239			`cpx #$11`
240			`bne eth6`
241			`lda #3 ; return 3 for UDP`
242			`bra eth5`
243			`eth6:`
244			`cpx #6`
245			`bne eth7`
246			`lda #4 ; return 4 for TCP`
247			`bra eth5`
248			`eth7:`
249			`eth3:`
250			`eor r1,r1,r1 ; return zero for unknown`
251			`ply`
252			`plx`
253			`rts`
254
255			`; r1 = address of packet to send`
256			`; r2 = packet length`
257			`;`
258			`message "eth_send_packet"`
259			`public eth_send_packet:`
260			`phx`
261			`phy`
262			`push r4`
263			`ldy #ETHMAC`
264			`; wait for tx buffer to be clear`
265			`eth8:`
266			`ld r4,0x100,y`
267			`bit r4,#$8000`
268			`bne eth8`
269			`ld r4,#1 ; clear tx interrupt`
270			`st r4,ETH_INT_SOURCE,y`
271			`; set address`
272			`sta 0x101,y`
273			`; set the packet length field and enable interrupts`
274			`asl r2,r2,#16`
275			`or r2,r2,#0xF000`
276			`stx 0x100,y`
277			`pop r4`
278			`ply`
279			`plx`
280			`rts`
281
282			`; Only for IP type packets (not ARP)`
283			`; r1 = rx buffer address`
284			`; r2 = swap flag`
285			`; Returns:`
286			`; r1 = data start index`
287			`;`
288			`message "eth_build_packet"`
289			`public eth_build_packet:`
290			`phy`
291			`push r4`
292			`push r5`
293			`push r6`
294			`push r7`
295			`push r8`
296			`push r9`
297			`push r10`
298
299			`lb r3,6,r1`
300			`lb r4,7,r1`
301			`lb r5,8,r1`
302			`lb r6,9,r1`
303			`lb r7,10,r1`
304			`lb r8,11,r1`
305			`; write to destination header`
306			`sb r3,0,r1`
307			`sb r4,1,r1`
308			`sb r5,2,r1`
309			`sb r6,3,r1`
310			`sb r7,4,r1`
311			`sb r8,5,r1`
312			`; write to source header`
313			`ld r3,#my_MAC1`
314			`sb r3,6,r1`
315			`ld r3,#my_MAC2`
316			`sb r3,7,r1`
317			`ld r3,#my_MAC3`
318			`sb r3,8,r1`
319			`ld r3,#my_MAC4`
320			`sb r3,9,r1`
321			`ld r3,#my_MAC5`
322			`sb r3,10,r1`
323			`ld r3,#my_MAC6`
324			`sb r3,11,r1`
325			`cmp r2,#1`
326			`bne eth16 ; if (swap)`
327			`lb r3,26,r1`
328			`lb r4,27,r1`
329			`lb r5,28,r1`
330			`lb r6,29,r1`
331			`; read destination`
332			`lb r7,30,r1`
333			`lb r8,31,r1`
334			`lb r9,32,r1`
335			`lb r10,33,r1`
336			`; write to sender`
337			`sb r7,26,r1`
338			`sb r8,27,r1`
339			`sb r9,28,r1`
340			`sb r10,29,r1`
341			`; write destination`
342			`sb r3,30,r1`
343			`sb r4,31,r1`
344			`sb r5,32,r1`
345			`sb r6,33,r1`
346			`eth16:`
347			`ldy eth_unique_id`
348			`iny`
349			`sty eth_unique_id`
350			`sb r3,19,r1`
351			`lsr r3,r3,#8`
352			`sb r3,18,r1`
353			`lb r3,14,r1`
354			`and r3,r3,#0xF`
355			`asl r3,r3,#2 ; *4`
356			`add r1,r3,#14 ; return datastart in r1`
357			`pop r10`
358			`pop r9`
359			`pop r8`
360			`pop r7`
361			`pop r6`
362			`pop r5`
363			`pop r4`
364			`ply`
365			`rts`
366
367			`; Compute IPv4 checksum of header`
368			`; r1 = packet address`
369			`; r2 = data start`
370			`;`
371			`message "eth_checksum"`
372			`public eth_checksum:`
373			`phy`
374			`push r4`
375			`push r5`
376			`push r6`
377			`; set checksum to zero`
378			`stz 24,r1`
379			`stz 25,r1`
380			`eor r3,r3,r3 ; r3 = sum = zero`
381			`ld r4,#14`
382			`eth15:`
383			`ld r5,r2`
384			`dec r5 ; r5 = datastart - 1`
385			`cmp r4,r5`
386			`bpl eth14`
387			`add r6,r1,r4`
388			`lb r5,0,r6 ; shi = [rx_addr+i]`
389			`lb r6,1,r6 ; slo = [rx_addr+i+1]`
390			`asl r5,r5,#8`
391			`or r5,r5,r6 ; shilo`
392			`add r3,r3,r5 ; sum = sum + shilo`
393			`add r4,r4,#2 ; i = i + 2`
394			`bra eth15`
395			`eth14:`
396			`ld r5,r3 ; r5 = sum`
397			`and r3,r3,#0xffff`
398			`lsr r5,r5,#16`
399			`add r3,r3,r5`
400			`eor r3,r3,#-1`
401			`sb r3,25,r1 ; low byte`
402			`lsr r3,r3,#8`
403			`sb r3,24,r1 ; high byte`
404			`pop r6`
405			`pop r5`
406			`pop r4`
407			`ply`
408			`rts`
409
410			`; r1 = packet address`
411			`; returns r1 = 1 if this IP`
412			`;`
413			`message "eth_verifyIP"`
414			`public eth_verifyIP:`
415			`phx`
416			`phy`
417			`push r4`
418			`push r5`
419			`lb r2,30,r1`
420			`lb r3,31,r1`
421			`lb r4,32,r1`
422			`lb r5,33,r1`
423			`; Check for general broadcast`
424			`cmp r2,#$FF`
425			`bne eth11`
426			`cmp r3,#$FF`
427			`bne eth11`
428			`cmp r4,#$FF`
429			`bne eth11`
430			`cmp r5,#$FF`
431			`bne eth11`
432			`eth12:`
433			`lda #1`
434			`eth13:`
435			`pop r5`
436			`pop r4`
437			`ply`
438			`plx`
439			`rts`
440			`eth11:`
441			`ld r1,r2`
442			`asl r1,r1,#8`
443			`or r1,r1,r3`
444			`asl r1,r1,#8`
445			`or r1,r1,r4`
446			`asl r1,r1,#8`
447			`or r1,r1,r5`
448			`cmp #$C0A8012A ; 192.168.1.42`
449			`beq eth12`
450			`eor r1,r1,r1`
451			`bra eth13`
452
453			`msgEthTest`
454			`db CR,LF,"Ethernet test - press CTRL-C to exit.",CR,LF,0`
455
456			`message "eth_main"`
457			`public eth_main:`
458			`jsr RequestIOFocus`
459			`jsr ClearScreen`
460			`jsr HomeCursor`
461			`lda #msgEthTest`
462			`jsr DisplayStringB`
463			`; jsr eth_init`
464			`jsr ethmac_setup`
465			`eth_loop:`
466			`jsr KeybdGetChar`
467			`cmp #-1`
468			`beq eth17`
469			`cmp #CTRLC`
470			`bne eth17`
471			`lda #$A000 ; tunr off transmit/recieve`
472			`sta ETH_MODER+ETHMAC`
473			`jsr ReleaseIOFocus`
474			`rts`
475			`eth17`
476			`lda #eth_rx_buffer<<2 ; memory address zero`
477			`jsr eth_request_packet`
478			`jsr eth_interpret_packet ; r1 = packet type`
479
480			`cmp #1`
481			`bne eth10`
482			`ld r2,r1 ; save off r1, r2 = packet type`
483			`lda #eth_rx_buffer<<2 ; memory address zero`
484			`jsr eth_verifyIP`
485			`tay`
486			`txa ; r1 = packet type again`
487			`cpy #1`
488			`bne eth10`
489
490			`lda #eth_rx_buffer<<2 ; memory address zero`
491			`ldx #1`
492			`jsr eth_build_packet`
493			`tay ; y = icmpstart`
494			`lda #eth_rx_buffer<<2 ; memory address zero`
495			`add r4,r1,r3`
496			`sb r0,0,r4 ; [rx_addr+icmpstart] = 0`
497			`lb r2,17,r1`
498			`add r2,r2,#14 ; r2 = len`
499			`ld r6,r2 ; r6 = len`
500			`add r15,r1,r3`
501			`lb r4,2,r15 ; shi`
502			`lb r5,3,r15 ; slo`
503			`asl r4,r4,#8`
504			`or r4,r4,r5 ; sum = {shi,slo};`
505			`eor r4,r4,#-1 ; sum = ~sum`
506			`sub r4,r4,#0x800 ; sum = sum - 0x800`
507			`eor r4,r4,#-1 ; sum = ~sum`
508			`add r15,r1,r3`
509			`sb r4,3,r15`
510			`lsr r4,r4,#8`
511			`sb r4,2,r15`
512			`tyx`
513			`jsr eth_checksum`
514			`lda #eth_rx_buffer<<2 ; memory address zero`
515			`ld r2,r6`
516			`jsr eth_send_packet`
517			`jmp eth_loop`
518			`eth10:`
519			`; r2 = rx_addr`
520			`cmp #2`
521			`bne eth_loop ; Do we have ARP ?`
522			`; xor r2,r2,r2 ; memory address zero`
523			`ldx #eth_rx_buffer<<2`
524			`; get the opcode`
525			`lb r13,21,x`
526			`cmp r13,#1`
527			`bne eth_loop ; ARP request`
528			`; get destination IP address`
529			`lb r9,38,x`
530			`lb r10,39,x`
531			`lb r11,40,x`
532			`lb r12,41,x`
533			`; set r15 = destination IP`
534			`ld r15,r9`
535			`asl r15,r15,#8`
536			`or r15,r15,r10`
537			`asl r15,r15,#8`
538			`or r15,r15,r11`
539			`asl r15,r15,#8`
540			`or r15,r15,r12`
541			`; Is it our IP ?`
542			`cmp r15,#$C0A8012A ; //192.168.1.42`
543			`bne eth_loop`
544			`; get source IP address`
545			`lb r5,28,x`
546			`lb r6,29,x`
547			`lb r7,30,x`
548			`lb r8,31,x`
549			`; set r14 = source IP`
550			`ld r14,r5`
551			`asl r14,r14,#8`
552			`or r14,r14,r6`
553			`asl r14,r14,#8`
554			`or r14,r14,r7`
555			`asl r14,r14,#8`
556			`or r14,r14,r8`
557			`; Get the source MAC address`
558			`push r6`
559			`push r7`
560			`push r8`
561			`push r9`
562			`push r10`
563			`push r11`
564			`lb r6,22,x`
565			`lb r7,23,x`
566			`lb r8,24,x`
567			`lb r9,25,x`
568			`lb r10,26,x`
569			`lb r11,27,x`
570			`; write to destination header`
571			`sb r6,0,x`
572			`sb r7,1,x`
573			`sb r8,2,x`
574			`sb r9,3,x`
575			`sb r10,4,x`
576			`sb r11,5,x`
577			`; and write to ARP destination`
578			`sb r6,32,x`
579			`sb r7,33,x`
580			`sb r8,34,x`
581			`sb r9,35,x`
582			`sb r10,36,x`
583			`sb r11,37,x`
584			`pop r11`
585			`pop r10`
586			`pop r9`
587			`pop r8`
588			`pop r7`
589			`pop r6`
590			`; write to source header`
591			`; stbc #0x00,6[r2]`
592			`; stbc #0xFF,7[r2]`
593			`; stbc #0xEE,8[r2]`
594			`; stbc #0xF0,9[r2]`
595			`; stbc #0xDA,10[r2]`
596			`; stbc #0x42,11[r2]`
597			`sb r0,6,x`
598			`lda #0xFF`
599			`sb r1,7,x`
600			`lda #0xEE`
601			`sb r1,8,x`
602			`lda #0xF0`
603			`sb r1,9,x`
604			`lda #0xDA`
605			`sb r1,10,x`
606			`lda #0x42`
607			`sb r1,11,x`
608			`; write to ARP source`
609			`; stbc #0x00,22[r2]`
610			`; stbc #0xFF,23[r2]`
611			`; stbc #0xEE,24[r2]`
612			`; stbc #0xF0,25[r2]`
613			`; stbc #0xDA,26[r2]`
614			`; stbc #0x42,27[r2]`
615			`sb r0,22,x`
616			`lda #0xFF`
617			`sb r1,23,x`
618			`lda #0xEE`
619			`sb r1,24,x`
620			`lda #0xF0`
621			`sb r1,25,x`
622			`lda #0xDA`
623			`sb r1,26,x`
624			`lda #0x42`
625			`sb r1,27,x`
626			`; swap sender / destination IP`
627			`; write sender`
628			`sb r9,28,x`
629			`sb r10,29,x`
630			`sb r11,30,x`
631			`sb r12,31,x`
632			`; write destination`
633			`sb r5,38,x`
634			`sb r6,39,x`
635			`sb r7,40,x`
636			`sb r8,41,x`
637			`; change request to reply`
638			`; stbc #2,21[r2]`
639			`lda #2`
640			`sb r1,21,x`
641			`txa ; r1 = packet address`
642			`ldx #0x2A ; r2 = packet length`
643			`jsr eth_send_packet`
644			`jmp eth_loop`
645