Subversion Repositories rv01_riscv_core

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-- RV01 self-test simulation script for Modelsim

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How to use this script:

1) Create Modelsim project into desired directory.

2) Customize script "SRC_DIR" variable, to point to the

directory holding VHDL source files (default is /SVN/VHDL).

3) Run the script. the script compiles all required VHDL source

file, adds a minimal set of waveforms to wave window and then

starts actual simulation, which runs for 1.1ms. When simulation

stops, wave window should look like snapshot in file

wave_1d1ms.PNG (both DONE and PASS signals are '1').