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[/] [rv01_riscv_core/] [trunk/] [VHDL/] [RV01_div_funcs_pkg.vhd] - Blame information for rev 2

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1 2 madsilicon
-----------------------------------------------------------------
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--                                                             --
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-----------------------------------------------------------------
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--                                                             --
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-- Copyright (C) 2015 Stefano Tonello                          --
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--                                                             --
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-- This source file may be used and distributed without        --
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-- restriction provided that this copyright statement is not   --
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-- removed from the file and that any derivative work contains --
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-- the original copyright notice and the associated disclaimer.--
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--                                                             --
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-- THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY         --
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-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   --
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-- TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   --
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-- FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      --
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-- OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         --
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-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    --
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-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   --
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-- GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        --
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-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  --
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-- LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  --
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-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  --
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-- OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         --
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-- POSSIBILITY OF SUCH DAMAGE.                                 --
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--                                                             --
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-----------------------------------------------------------------
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---------------------------------------------------------------
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-- Divider shifting functions
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---------------------------------------------------------------
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.numeric_std.all;
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package RV01_DIV_FUNCS_PKG is
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  function div_shift_left32(SI : unsigned;SHFT : integer range 0 to 32) return unsigned;
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  function div_shift_right32(SI : unsigned;SHFT : integer range 0 to 32) return unsigned;
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end package;
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package body RV01_DIV_FUNCS_PKG is
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  function div_shift_left32(SI : unsigned;SHFT : integer range 0 to 32) return unsigned is
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    variable SO : unsigned(SI'HIGH downto SI'LOW);
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  begin
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    case SHFT is
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      when 0  => SO := SI sll 0;
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      when 1  => SO := SI sll 1;
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      when 2  => SO := SI sll 2;
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      when 3  => SO := SI sll 3;
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      when 4  => SO := SI sll 4;
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      when 5  => SO := SI sll 5;
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      when 6  => SO := SI sll 6;
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      when 7  => SO := SI sll 7;
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      when 8  => SO := SI sll 8;
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      when 9  => SO := SI sll 9;
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      when 10 => SO := SI sll 10;
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      when 11 => SO := SI sll 11;
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      when 12 => SO := SI sll 12;
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      when 13 => SO := SI sll 13;
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      when 14 => SO := SI sll 14;
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      when 15 => SO := SI sll 15;
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      when 16 => SO := SI sll 16;
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      when 17 => SO := SI sll 17;
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      when 18 => SO := SI sll 18;
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      when 19 => SO := SI sll 19;
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      when 20 => SO := SI sll 20;
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      when 21 => SO := SI sll 21;
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      when 22 => SO := SI sll 22;
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      when 23 => SO := SI sll 23;
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      when 24 => SO := SI sll 24;
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      when 25 => SO := SI sll 25;
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      when 26 => SO := SI sll 26;
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      when 27 => SO := SI sll 27;
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      when 28 => SO := SI sll 28;
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      when 29 => SO := SI sll 29;
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      when 30 => SO := SI sll 30;
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      when 31 => SO := SI sll 31;
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      when others => SO := SI sll 32;
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    end case;
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    return(SO);
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  end function;
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  function div_shift_right32(SI : unsigned;SHFT : integer range 0 to 32) return unsigned is
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    variable SO : unsigned(SI'HIGH downto SI'LOW);
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  begin
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    case SHFT is
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      when 0  => SO := SI srl 0;
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      when 1  => SO := SI srl 1;
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      when 2  => SO := SI srl 2;
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      when 3  => SO := SI srl 3;
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      when 4  => SO := SI srl 4;
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      when 5  => SO := SI srl 5;
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      when 6  => SO := SI srl 6;
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      when 7  => SO := SI srl 7;
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      when 8  => SO := SI srl 8;
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      when 9  => SO := SI srl 9;
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      when 10 => SO := SI srl 10;
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      when 11 => SO := SI srl 11;
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      when 12 => SO := SI srl 12;
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      when 13 => SO := SI srl 13;
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      when 14 => SO := SI srl 14;
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      when 15 => SO := SI srl 15;
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      when 16 => SO := SI srl 16;
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      when 17 => SO := SI srl 17;
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      when 18 => SO := SI srl 18;
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      when 19 => SO := SI srl 19;
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      when 20 => SO := SI srl 20;
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      when 21 => SO := SI srl 21;
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      when 22 => SO := SI srl 22;
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      when 23 => SO := SI srl 23;
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      when 24 => SO := SI srl 24;
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      when 25 => SO := SI srl 25;
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      when 26 => SO := SI srl 26;
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      when 27 => SO := SI srl 27;
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      when 28 => SO := SI srl 28;
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      when 29 => SO := SI srl 29;
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      when 30 => SO := SI srl 30;
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      when 31 => SO := SI srl 31;
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      when others => SO := SI srl 32;
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    end case;
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    return(SO);
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  end function;
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end package body;

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