Subversion Repositories rv01_riscv_core

-----------------------------------------------------------------

--                                                             --

-----------------------------------------------------------------

--                                                             --

-- Copyright (C) 2015 Stefano Tonello                          --

--                                                             --

-- This source file may be used and distributed without        --

-- restriction provided that this copyright statement is not   --

-- removed from the file and that any derivative work contains --

-- the original copyright notice and the associated disclaimer.--

--                                                             --

-- THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY         --

-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   --

-- TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   --

-- FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      --

-- OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         --

-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    --

-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   --

-- GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        --

-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  --

-- LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  --

-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  --

-- OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         --

-- POSSIBILITY OF SUCH DAMAGE.                                 --

--                                                             --

-----------------------------------------------------------------

---------------------------------------------------------------

-- RV01 ALU, B/J and load/store operations package

---------------------------------------------------------------

library IEEE;

use IEEE.std_logic_1164.all;

use IEEE.numeric_std.all;

library WORK;

use WORK.RV01_CONSTS_PKG.all;

package RV01_OP_PKG is

  -- Scalar ALU operation type

  type ALU_OP_T is (

    ALU_MOVB,

    ALU_ADD,

    ALU_AUIPC,

    ALU_JAL,

    ALU_SLT,

    ALU_SUB,

    ALU_MUL,

    ALU_MULH,

    ALU_MULHU,

    ALU_MULHSU,

    ALU_SHL,

    ALU_SHR,

    ALU_AND,

    ALU_OR,

    ALU_XOR,

    ALU_DIV,

    ALU_REM,

    ALU_NIL

  );

  type BJ_OP_T is (

    BJ_JAL,

    BJ_JALR,

    BJ_BEQ,

    BJ_BNE,

    BJ_BLT,

    BJ_BGE,

    BJ_NIL

  );

  type LS_OP_T is (

    LS_LB,

    LS_LH,

    LS_LW,

    LS_SB,

    LS_SH,

    LS_SW,

    LS_NIL

  );

 type CS_OP_T is (

   CS_RW,

   CS_RS,

   CS_RC,

   CS_RWI,

   CS_RSI,

   CS_RCI,

   CS_NIL

 );

 type FP_OP_T is (

   FP_ADDS,

   FP_SUBS,

   FP_MULS,

   FP_DIVS,

   FP_CVTWS,

   FP_CVTSW,

   FP_MVXS,

   FP_MVSX,

   FP_CMP,

   FP_NIL

 );

end package;