Subversion Repositories rv01_riscv_core

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-- Copyright (C) 2016 Stefano Tonello                          --

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-- RV01 PLIC gateway

---------------------------------------------------------------

library IEEE;

use IEEE.std_logic_1164.all;

use IEEE.numeric_std.all;

library work;

use work.RV01_PLIC_PKG.all;

entity RV01_PLIC_GWAY is

  generic(

    TRIG_TYPE : PLIC_TRIG_TYPE := LEVEL;

    REQ_MAXCNT : natural := 16

  );

  port(

    CLK_i : in std_logic;

    RST_i : in std_logic;

    REQ_i : in std_logic;

    IS_i : in std_logic;

    IP_o : out std_logic

  );

end RV01_PLIC_GWAY;

architecture ARC of RV01_PLIC_GWAY is

  signal IP,IP_q : std_logic;

  signal REQ,REQ_q,REQ_EDGE : std_logic;

  signal REQ_CNT_q : natural range 0 to REQ_MAXCNT-1;

begin

  GL: if(TRIG_TYPE = LEVEL) generate

  process(IP_q,REQ_i,IS_i)

  begin

    if(IP_q = '0') then

      -- Set pending request register 

      IP <= REQ_i;

    elsif(IS_i = '1' and REQ_i = '0') then

      -- Pending request has been serviced,

      -- and there's no new request:

      -- clear pending request register 

      IP <= '0';

    else

      IP <= IP_q;

    end if;

  end process;

  end generate;

  GE: if(TRIG_TYPE = EDGE) generate

  -- REQ_i edge detector

  process(CLK_i)

  begin

    if(CLK_i = '1' and CLK_i'event) then

      if(RST_i = '1') then

        REQ_q <= '0';

      else

        REQ_q <= REQ_i;

      end if;

    end if;

  end process;

  REQ_EDGE <= REQ_i and REQ_q;

  -- Pending request counter

  process(CLK_i)

  begin

    if(CLK_i = '1' and CLK_i'event) then

      if(RST_i = '1') then

        REQ_CNT_q <= 0;

      elsif(REQ_EDGE = '1' and REQ_CNT_q < REQ_MAXCNT and IS_i = '0') then

        -- There's a new request and pending 

        -- one has not been serviced: increment count.

        REQ_CNT_q <= REQ_CNT_q + 1;

      elsif(REQ_EDGE = '0' and REQ_CNT_q > 0 and IS_i = '1') then

        -- There's no new request and pending one has

        -- ben serviced: decrement count.

        REQ_CNT_q <= REQ_CNT_q - 1;

      end if;

    end if;

  end process;

  IP <= '1' when (REQ_CNT_q > 0) else '0';

  end generate;

  -- Pending request register

  process(CLK_i)

  begin

    if(CLK_i = '1' and CLK_i'event) then

      if(RST_i = '1') then

        IP_q <= '0';

      else

        IP_q <= IP;

      end if;

    end if;

  end process;

  IP_o <= IP_q;

end ARC;