Subversion Repositories rv01_riscv_core

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-- Copyright (C) 2016 Stefano Tonello                          --

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---------------------------------------------------------------

-- RV01 result mux (IX3 stage)

---------------------------------------------------------------

library IEEE;

use IEEE.std_logic_1164.all;

use IEEE.numeric_std.all;

library work;

use work.RV01_CONSTS_PKG.all;

use work.RV01_TYPES_PKG.all;

use work.RV01_IDEC_PKG.all;

entity RV01_RESMUX_IX3 is

  generic(

    PXE : std_logic := '1';

    DXE : std_logic := '1';

    NW : natural := 2

  );

  port(

    DRD0_i : in SDWORD_T;

    DRD1_i : in SDWORD_T;

    PA0_ALU_RES_i : in SDWORD_T;

    PA1_ALU_RES_i : in SDWORD_T;

    LDAT0_i : in SDWORD_T;

    LDAT1_i : in SDWORD_T;

    LDAT_V_i : in std_logic_vector(NW-1 downto 0);

    PASEL0_i : in std_logic_vector(4-1 downto 0);

    PASEL1_i : in std_logic_vector(4-1 downto 0);

    FWDE_i : in std_logic_vector(NW-1 downto 0);

    RES_SRC0_i : in RES_SRC_T;

    CSRU_RES_i : in SDWORD_T;

    DRD0_o : out SDWORD_T;

    DRD1_o : out SDWORD_T

  );

end RV01_RESMUX_IX3;

architecture ARC of RV01_RESMUX_IX3 is

begin

  -------------------------------------------

  -- Delayed execution disabled

  -------------------------------------------

  GDX_0 : if(DXE = '0') generate

  -- Pipe #0 IX3 result can be provided by IX2 result, LSU

  -- (only for lb* and lh* instructions) or CSRU.

  DRD0_o <=

    LDAT0_i when (LDAT_V_i(0) = '1')

    else CSRU_RES_i when (RES_SRC0_i = RS_SIU)

    else DRD0_i;

  -- Pipe #1 IX3 result can be provided by IX2 result or LSU

  -- (only for lb* and lh* instructions).

  GPX_0_1 : if(PXE = '1') generate

  DRD1_o <=

    LDAT1_i when (LDAT_V_i(1) = '1')

    else DRD1_i;

  end generate; -- GPX_0_1

  GPX_0_0 : if(PXE = '0') generate

  DRD1_o <= (others => '0');

  end generate; -- GPX_0_0

  end generate;

  -------------------------------------------

  -- Delayed execution enabled

  -------------------------------------------

  GDX_1 : if(DXE = '1') generate

  DRD0_o <=

    LDAT0_i when (LDAT_V_i(0) = '1')

    else PA0_ALU_RES_i when (FWDE_i(0) = '1' and (PASEL0_i(0) = '1' or PASEL0_i(2) = '1'))

    else CSRU_RES_i when (RES_SRC0_i = RS_SIU)

    else DRD0_i;

  -- Pipe #1 IX3 result can be provided by IX2 result or LSU

  -- (only for lb* and lh* instructions).

  GPX_1_1 : if(PXE = '1') generate

  DRD1_o <=

    LDAT1_i when (LDAT_V_i(1) = '1')

    else PA1_ALU_RES_i when (FWDE_i(1) = '1' and (PASEL1_i(0) = '1' or PASEL1_i(2) = '1'))

    else DRD1_i;

  end generate; -- GPX_1_1

  GPX_1_0 : if(PXE = '0') generate

  DRD1_o <= (others => '0');

  end generate; -- GPX_1_0

  end generate;

end ARC;