| 1 |
3 |
fafa1971 |
-v /usr/design/simplyrisc-s1/hdl/behav/sparc_libs/m1_lib.v
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| 2 |
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-v /usr/design/simplyrisc-s1/hdl/behav/sparc_libs/u1_lib.v
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| 3 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_cm16x40.v
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| 4 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_cm16x40b.v
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| 5 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_dcd.v
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| 6 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_dcm.v
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| 7 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_efa.v
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| 8 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_frf.v
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| 9 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_icd.v
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| 10 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_idct.v
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| 11 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_irf.v
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| 12 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_l2d.v
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| 13 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_l2d_32k.v
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| 14 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_l2d_rep_bot.v
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| 15 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_l2d_rep_top.v
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| 16 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_rf16x128d.v
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| 17 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_rf16x160.v
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| 18 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_rf16x32.v
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| 19 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_rf32x108.v
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| 20 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_rf32x152b.v
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| 21 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_rf32x80.v
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| 22 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_scm.v
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| 23 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_r_tlb.v
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| 24 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_rf_16x65.v
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| 25 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_rf_16x81.v
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| 26 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_cclk_hdr_48x.v
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| 27 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_cclk_hdr_64x.v
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| 28 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_cclk_inv_128x.v
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| 29 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_cclk_inv_48x.v
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| 30 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_cclk_inv_64x.v
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| 31 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_cclk_inv_96x.v
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| 32 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_cclk_scanlasr_2x.v
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| 33 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_cclk_sync.v
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| 34 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gclk_center_3inv.v
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| 35 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gclk_inv_192x.v
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| 36 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gclk_inv_224x.v
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| 37 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gclk_inv_288x.v
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| 38 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gclk_inv_r90_192x.v
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| 39 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gclk_inv_r90_224x.v
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| 40 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gclk_inv_r90_256x.v
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| 41 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gclk_sctag_3inv.v
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| 42 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gl.v
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| 43 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gl_fdbk.v
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| 44 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gl_hz.v
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| 45 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gl_rstce_rtl.v
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| 46 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_gl_vrt_all.v
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| 47 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xa0.v
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| 48 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xa1.v
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| 49 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xb0.v
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| 50 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xb1.v
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| 51 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xb2.v
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| 52 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xb3.v
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| 53 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xc0.v
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| 54 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xc1.v
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| 55 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xc2.v
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| 56 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xc3.v
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| 57 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xc4.v
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| 58 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xc5.v
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| 59 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xc6.v
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| 60 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/flop_rptrs_xc7.v
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| 61 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_rng.v
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| 62 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/cluster_header.v
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| 63 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/cluster_header_ctu.v
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| 64 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/cluster_header_dup.v
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| 65 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/cluster_header_sync.v
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| 66 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/cmp_sram_redhdr.v
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| 67 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/dbl_buf.v
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| 68 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/swrvr_clib.v
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| 69 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/swrvr_dlib.v
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| 70 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sync_pulse_synchronizer.v
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| 71 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/synchronizer_asr.v
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| 72 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/test_stub_bist.v
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| 73 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/synchronizer_asr_dup.v
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| 74 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/test_stub_scan.v
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| 75 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/ucb_bus_in.v
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| 76 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/ucb_bus_out.v
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| 77 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/ucb_flow_2buf.v
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| 78 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/ucb_flow_jbi.v
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| 79 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/ucb_flow_spi.v
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| 80 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/ucb_noflow.v
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| 81 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/mul64.v
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| 82 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu.v
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| 83 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_alu.v
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| 84 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_alu_16eql.v
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| 85 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_aluadder64.v
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| 86 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_aluaddsub.v
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| 87 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_alulogic.v
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| 88 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_aluor32.v
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| 89 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_aluspr.v
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| 90 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_aluzcmp64.v
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| 91 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_byp.v
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| 92 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_byp_eccgen.v
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| 93 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_div.v
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| 94 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_div_32eql.v
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| 95 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_div_yreg.v
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| 96 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_ecc.v
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| 97 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_ecc_dec.v
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| 98 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_ecl.v
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| 99 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_ecl_cnt6.v
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| 100 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_ecl_divcntl.v
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| 101 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_ecl_eccctl.v
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| 102 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_ecl_mdqctl.v
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| 103 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_ecl_wb.v
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| 104 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_eclbyplog.v
|
| 105 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_eclbyplog_rs1.v
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| 106 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_eclccr.v
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| 107 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_eclcomp7.v
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| 108 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_reg.v
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| 109 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_rml.v
|
| 110 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_rml_cwp.v
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| 111 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_rml_inc3.v
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| 112 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_rndrob.v
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| 113 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_exu_shft.v
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| 114 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ffu.v
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| 115 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ffu_ctl.v
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| 116 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ffu_ctl_visctl.v
|
| 117 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ffu_dp.v
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| 118 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ffu_part_add32.v
|
| 119 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ffu_vis.v
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| 120 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu.v
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| 121 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_cmp35.v
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| 122 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_ctr5.v
|
| 123 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_dcl.v
|
| 124 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_dec.v
|
| 125 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_errctl.v
|
| 126 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_errdp.v
|
| 127 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_fcl.v
|
| 128 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_fdp.v
|
| 129 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_ifqctl.v
|
| 130 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_ifqdp.v
|
| 131 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_imd.v
|
| 132 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_incr46.v
|
| 133 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_invctl.v
|
| 134 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_lfsr5.v
|
| 135 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_lru4.v
|
| 136 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_mbist.v
|
| 137 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_milfsm.v
|
| 138 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_par16.v
|
| 139 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_par32.v
|
| 140 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_par34.v
|
| 141 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_rndrob.v
|
| 142 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_sscan.v
|
| 143 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_swl.v
|
| 144 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_swpla.v
|
| 145 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_thrcmpl.v
|
| 146 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_thrfsm.v
|
| 147 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_ifu_wseldp.v
|
| 148 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu.v
|
| 149 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_asi_decode.v
|
| 150 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_dc_parity_gen.v
|
| 151 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_dcache_lfsr.v
|
| 152 |
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_dcdp.v
|
| 153 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_dctl.v
|
| 154 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_dctldp.v
|
| 155 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_excpctl.v
|
| 156 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_pcx_qmon.v
|
| 157 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_qctl1.v
|
| 158 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_qctl2.v
|
| 159 |
|
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-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_qdp1.v
|
| 160 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_qdp2.v
|
| 161 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_rrobin_picker2.v
|
| 162 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_stb_ctl.v
|
| 163 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_stb_ctldp.v
|
| 164 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_stb_rwctl.v
|
| 165 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_stb_rwdp.v
|
| 166 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_tagdp.v
|
| 167 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/lsu_tlbdp.v
|
| 168 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_mul_cntl.v
|
| 169 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_mul_dp.v
|
| 170 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_mul_top.v
|
| 171 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/bw_clk_cl_sparc_cmp.v
|
| 172 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/cpx_spc_buf.v
|
| 173 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/cpx_spc_rpt.v
|
| 174 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc.v
|
| 175 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spc_pcx_buf.v
|
| 176 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu.v
|
| 177 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_ctl.v
|
| 178 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_lsurpt.v
|
| 179 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_lsurpt1.v
|
| 180 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_maaddr.v
|
| 181 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_maaeqb.v
|
| 182 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_mactl.v
|
| 183 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_madp.v
|
| 184 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_maexp.v
|
| 185 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_mald.v
|
| 186 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_mamul.v
|
| 187 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_mared.v
|
| 188 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_mast.v
|
| 189 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/spu_wen.v
|
| 190 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_tlu_dec64.v
|
| 191 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_tlu_intctl.v
|
| 192 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_tlu_intdp.v
|
| 193 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_tlu_penc64.v
|
| 194 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/sparc_tlu_zcmp64.v
|
| 195 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu.v
|
| 196 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_addern_32.v
|
| 197 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_hyperv.v
|
| 198 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_incr64.v
|
| 199 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_misctl.v
|
| 200 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_mmu_ctl.v
|
| 201 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_mmu_dp.v
|
| 202 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_pib.v
|
| 203 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_prencoder16.v
|
| 204 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_rrobin_picker.v
|
| 205 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_tcl.v
|
| 206 |
|
|
-v /usr/design/simplyrisc-s1/hdl/rtl/sparc_core/tlu_tdp.v
|
| 207 |
|
|
/usr/design/simplyrisc-s1/hdl/rtl/s1_top/rst_ctrl.v
|
| 208 |
|
|
/usr/design/simplyrisc-s1/hdl/rtl/s1_top/int_ctrl.v
|
| 209 |
|
|
/usr/design/simplyrisc-s1/hdl/rtl/s1_top/spc2wbm.v
|
| 210 |
|
|
/usr/design/simplyrisc-s1/hdl/rtl/s1_top/s1_top.v
|
| 211 |
|
|
/usr/design/simplyrisc-s1/hdl/behav/testbench/mem_harness.v
|
| 212 |
|
|
/usr/design/simplyrisc-s1/hdl/behav/testbench/testbench.v
|
| 213 |
|
|
+incdir+/usr/design/simplyrisc-s1/hdl/rtl/sparc_core/include
|
| 214 |
|
|
+incdir+/usr/design/simplyrisc-s1/hdl/rtl/s1_top
|
