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// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T1 Processor File: lsu_dcache_lfsr.v
// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
// 
// The above named program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public
// License version 2 as published by the Free Software Foundation.
// 
// The above named program is distributed in the hope that it will be 
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
// General Public License for more details.
// 
// You should have received a copy of the GNU General Public
// License along with this work; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
// 
// ========== Copyright Header End ============================================
`ifdef SIMPLY_RISC_TWEAKS
`define SIMPLY_RISC_SCANIN .si(0)
`else
`define SIMPLY_RISC_SCANIN .si()
`endif
////////////////////////////////////////////////////////////////////////
/*
//  Module Name: lsu_dcache_lfsr
*/
////////////////////////////////////////////////////////////////////////
 
module lsu_dcache_lfsr (/*AUTOARG*/
   // Outputs
   out,
   // Inputs
   advance, clk, se, si, so, reset
   );
 
   input        advance;
 
   input        clk, se, si, so, reset;
 
   output [1:0] out;
 
   reg [4:0]    q_next;
   wire [4:0]   q;
 
 
/*
   always @ (posedge clk)
     begin
        out = $random;
     end // always @ posedge
 */
 
//   always @ (posedge clk)
//     begin
//      q[4:0] <= q_next[4:0];
//     end
 
   always @ (/*AUTOSENSE*/advance or q or reset)
     begin
              if (reset)
                q_next = 5'b11111;
              else if (advance)
                begin
                   // lfsr -- stable at 000000, period of 63
                   q_next[1] = q[0];
                   q_next[2] = q[1];
                   q_next[3] = q[2];
                   q_next[4] = q[3];
                   q_next[0] = q[1] ^ q[4];
                end
              else
                q_next = q;
     end // always @ (...
 
   assign out = {q[0], q[2]};
 
   dff_s #(5) lfsr_reg(.din  (q_next),
                     .q    (q),
                     .clk  (clk), .se(se), `SIMPLY_RISC_SCANIN, .so());
 
endmodule // lsu_dcache_lfsr
 
 
 
 

Line No.	Rev	Author	Line
1	95	fafa1971	`// ========== Copyright Header Begin ==========================================`
2			`//`
3			`// OpenSPARC T1 Processor File: lsu_dcache_lfsr.v`
4			`// Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.`
5			`// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.`
6			`//`
7			`// The above named program is free software; you can redistribute it and/or`
8			`// modify it under the terms of the GNU General Public`
9			`// License version 2 as published by the Free Software Foundation.`
10			`//`
11			`// The above named program is distributed in the hope that it will be`
12			`// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of`
13			`// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU`
14			`// General Public License for more details.`
15			`//`
16			`// You should have received a copy of the GNU General Public`
17			`// License along with this work; if not, write to the Free Software`
18			`// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.`
19			`//`
20			`// ========== Copyright Header End ============================================`
21	113	albert.wat	`ifdef SIMPLY_RISC_TWEAKS
22			`define SIMPLY_RISC_SCANIN .si(0)
23			`else
24			`define SIMPLY_RISC_SCANIN .si()
25			`endif
26	95	fafa1971	`////////////////////////////////////////////////////////////////////////`
27			`/*`
28			`// Module Name: lsu_dcache_lfsr`
29			`*/`
30			`////////////////////////////////////////////////////////////////////////`
31
32			`module lsu_dcache_lfsr (/AUTOARG/`
33			`// Outputs`
34			`out,`
35			`// Inputs`
36			`advance, clk, se, si, so, reset`
37			`);`
38
39			`input advance;`
40
41			`input clk, se, si, so, reset;`
42
43			`output [1:0] out;`
44
45			`reg [4:0] q_next;`
46			`wire [4:0] q;`
47
48
49			`/*`
50			`always @ (posedge clk)`
51			`begin`
52			`out = $random;`
53			`end // always @ posedge`
54			`*/`
55
56			`// always @ (posedge clk)`
57			`// begin`
58			`// q[4:0] <= q_next[4:0];`
59			`// end`
60
61			`always @ (/AUTOSENSE/advance or q or reset)`
62			`begin`
63			`if (reset)`
64			`q_next = 5'b11111;`
65			`else if (advance)`
66			`begin`
67			`// lfsr -- stable at 000000, period of 63`
68			`q_next[1] = q[0];`
69			`q_next[2] = q[1];`
70			`q_next[3] = q[2];`
71			`q_next[4] = q[3];`
72			`q_next[0] = q[1] ^ q[4];`
73			`end`
74			`else`
75			`q_next = q;`
76			`end // always @ (...`
77
78			`assign out = {q[0], q[2]};`
79
80	113	albert.wat	`dff_s #(5) lfsr_reg(.din (q_next),`
81	95	fafa1971	`.q (q),`
82	113	albert.wat	.clk (clk), .se(se), `SIMPLY_RISC_SCANIN, .so());
83	95	fafa1971
84			`endmodule // lsu_dcache_lfsr`
85
86
87
88

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[/] [s1_core/] [trunk/] [hdl/] [rtl/] [sparc_core/] [lsu_dcache_lfsr.v] - Blame information for rev 113