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[/] [s1_core/] [trunk/] [tests/] [boot/] [rom_harness.dis] - Blame information for rev 113

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Line No. Rev Author Line
1 113 albert.wat
 
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boot/boot.bin:     file format elf64-sparc
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Disassembly of section .text:
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0000000000000000 :
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   0:   01 00 00 00     nop
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   4:   01 00 00 00     nop
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   8:   01 00 00 00     nop
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   c:   01 00 00 00     nop
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  10:   01 00 00 00     nop
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  14:   01 00 00 00     nop
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  18:   01 00 00 00     nop
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  1c:   01 00 00 00     nop
15
  20:   93 90 00 00     wrpr  %g0, %cwp
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  24:   95 90 20 06     wrpr  6, %cansave
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  28:   97 90 00 00     wrpr  %g0, %canrestore
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  2c:   9b 90 00 00     wrpr  %g0, %otherwin
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  30:   99 90 20 07     wrpr  7, %cleanwin
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  34:   9d 90 20 07     wrpr  7, %wstate
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  38:   a2 00 20 01     add  %g0, 1, %l1
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  3c:   92 00 20 01     add  %g0, 1, %o1
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  40:   b2 00 20 01     add  %g0, 1, %i1
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  44:   a4 04 60 01     add  %l1, 1, %l2
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  48:   94 02 60 01     add  %o1, 1, %o2
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  4c:   b4 06 60 01     add  %i1, 1, %i2
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  50:   a6 04 a0 01     add  %l2, 1, %l3
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  54:   96 02 a0 01     add  %o2, 1, %o3
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  58:   b6 06 a0 01     add  %i2, 1, %i3
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  5c:   01 00 00 00     nop
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  60:   01 00 00 00     nop
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  64:   01 00 00 00     nop
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  68:   01 00 00 00     nop
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  6c:   a2 10 00 00     mov  %g0, %l1
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  70:   82 10 20 10     mov  0x10, %g1
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  74:   e2 f0 48 40     stxa  %l1, [ %g1 ] (66)
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  78:   a3 48 00 00     rdhpr  %hpstate, %l1
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  7c:   81 9c 68 20     wrhpr  %l1, 0x820, %hpstate
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  80:   82 10 20 18     mov  0x18, %g1
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  84:   c0 f0 0a 01     stxa  %g0, [ %g0 + %g1 ] (80)
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  88:   c0 f0 0b 01     stxa  %g0, [ %g0 + %g1 ] (88)
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  8c:   a2 10 20 03     mov  3, %l1
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  90:   e2 f0 09 60     stxa  %l1, [ %g0 ] (75)
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  94:   82 10 20 01     mov  1, %g1
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  98:   a3 28 70 12     sllx  %g1, 0x12, %l1
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  9c:   83 28 70 0f     sllx  %g1, 0xf, %g1
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  a0:   a2 14 40 01     or  %l1, %g1, %l1
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  a4:   8b 9c 40 00     wrhpr  %l1, %htba
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  a8:   82 10 20 30     mov  0x30, %g1
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  ac:   84 10 00 00     mov  %g0, %g2
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00000000000000b0 :
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  b0:   c0 f0 4a 00     stxa  %g0, [ %g1 ] (80)
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  b4:   c0 f0 8a a0     stxa  %g0, [ %g2 ] (85)
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  b8:   84 00 a0 08     add  %g2, 8, %g2
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  bc:   80 a0 a2 00     cmp  %g2, 0x200
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  c0:   12 bf ff fc     bne  b0 
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  c4:   01 00 00 00     nop
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  c8:   82 10 20 30     mov  0x30, %g1  ! 30 
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  cc:   84 10 00 00     mov  %g0, %g2
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00000000000000d0 :
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  d0:   c0 f0 4b 00     stxa  %g0, [ %g1 ] (88)
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  d4:   c0 f0 8b a0     stxa  %g0, [ %g2 ] (93)
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  d8:   84 00 a0 08     add  %g2, 8, %g2
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  dc:   80 a0 a2 00     cmp  %g2, 0x200
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  e0:   12 bf ff fc     bne  d0 
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  e4:   01 00 00 00     nop
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  e8:   c0 f0 0c 00     stxa  %g0, [ %g0 ] (96)
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  ec:   82 10 20 08     mov  8, %g1
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  f0:   c0 f0 0c 01     stxa  %g0, [ %g0 + %g1 ] (96)
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  f4:   a2 10 20 08     mov  8, %l1
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  f8:   c0 f4 44 20     stxa  %g0, [ %l1 ] (33)
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  fc:   a2 10 20 10     mov  0x10, %l1
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 100:   c0 f4 44 20     stxa  %g0, [ %l1 ] (33)
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 104:   a2 10 20 0c     mov  0xc, %l1
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 108:   e2 f0 08 a0     stxa  %l1, [ %g0 ] (69)
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 10c:   03 00 00 00     sethi  %hi(0), %g1
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 110:   05 00 01 00     sethi  %hi(0x40000), %g2
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 114:   82 10 00 01     mov  %g1, %g1
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 118:   84 10 00 02     mov  %g2, %g2
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 11c:   83 28 70 20     sllx  %g1, 0x20, %g1
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 120:   84 10 80 01     or  %g2, %g1, %g2
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 124:   87 48 00 00     rdhpr  %hpstate, %g3
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 128:   8f 90 20 01     wrpr  1, %tl
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 12c:   a2 10 20 00     clr  %l1
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 130:   83 98 c0 00     wrhpr  %g3, %htstate
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 134:   8f 90 20 00     wrpr  0, %tl
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 138:   90 10 20 00     clr  %o0
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 13c:   81 c0 80 00     jmp  %g2
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 140:   01 00 00 00     nop
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 144:   01 00 00 00     nop

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