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dgisselq |
# Description
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This CMOD-S6 SoC grew out of the desire to demonstrate that a useful ZipCPU
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soft core implementation could be made in a very small space. In
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particular, one of the purposes of the ZipCPU was to be able to operate successfully in a very area-challenged environment. The CMOD-S6, as sold by Digilent
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Inc., provides this environment for this project.
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# The CPU
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For those not familiar with the ZipCPU, it is a soft core CPU designed
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specifically for small area implementations. The CPU is a full 32-bit CPU,
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designed as a RISC load/store architecture, having a full set of thirty-two
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32-bit registers (of which 16 may be used at any one time), and has a single
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wishbone bus for both instructions and data (Von Neumann architecture). The
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particular implementation of the ZipCPU used for this SoC project is not
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pipelined, nor does it have either instruction or data caches--they simply
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wouldn't fit within the FPGA. Still, a CPU is a CPU and this CPU will
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execute the instructions given to it faithfully.
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# Peripherals
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A SoC is really a soft core CPU combined with a bus, giving the CPU access to
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a variety of peripherals. In this case, the CMod-S6 SoC offers the user with the following peripherals:
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1. An I/O space containing
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a. an interrupt controller
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b. the address of the last bus error
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c. a system timer
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d. a watchdog timer
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e. an audio controller consisting of a PRM driver and another (supporting) timer
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f. a GPIO controller capable of implementing SPI and I2C (SPI is working, as this is used to drive the display successfully)
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g. UART Rx/Tx
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h. support for the on-board LED's and buttons, as well as for ...
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i. an external 16-character keypad controller.
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2. A debug scope, capable of recording 1024 words of debugging information within the core upon any trigger.
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3. A 16-kB On-chip block RAM
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4. 16-MB flash for holding both the FPGA configuration as well as any user programs. (The configuration takes about 512kB of flash.)
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All of these peripherals have been tested, and they are known to work.
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# The Demo Task
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This board will be (has been!) proven with the (imaginary) task of implementing
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a security light for a home. The light works in this fashion: when someone
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presses the doorbell (one of the on-board buttons), the system will then play
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a doorbell sound on the audio port, and turn on the outdoor lights for a half
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an hour. Further, the keypad will allow a user to set the current time, and
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set times when the outdoor lights should not be turned on (i.e., during the
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daytime). Finally, the GPIO pins will be used to control a 2-line display that
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will show either a blank screen (if not being used), the time of the last
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doorbell press, or a menu driven screen for use with the keypad.
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The UART will be (has been) used primarily as a debug port, both to output
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current status (ala debug by printf), as well as to allow access to a second
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S6 configuration which can be used for programming the flash.
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# Current Status
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20160523: I am going to place this project down in my "done" category of
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projects. It currently does all that I have asked of it and all that I intended
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the project to do. Please feel free to write if you have comments, thoughts,
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questions, or even suggestions.
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20170126: I'm in the process of updating the project to work with the newer version of the ZipCPU--the one that can handle the more traditional 8-bit bytes, rather than the 32-bit bytes the original ZipCPU could only handle.
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20170309: All of the prior ZipOS functionality now works (again) using the new ZipCPU.
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