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[/] [s6soc/] [trunk/] [bench/] [cpp/] [qspiflashsim.h] - Blame information for rev 8

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1 2 dgisselq
///////////////////////////////////////////////////////////////////////////
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//
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// Filename:    spiflashsim.h
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//
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// Project:     Wishbone Controlled Quad SPI Flash Controller
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//
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// Purpose:     This library simulates the operation of a Quad-SPI commanded
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//              flash, such as the S25FL032P used on the Basys-3 development
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//              board by Digilent.  As such, it is defined by 32 Mbits of
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//              memory (4 Mbyte).
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//
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// Creator:     Dan Gisselquist
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//              Gisselquist Technology, LLC
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//
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///////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of  the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program.  (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.)  If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License:     GPL, v3, as defined and found on www.gnu.org,
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//              http://www.gnu.org/licenses/gpl.html
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//
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//
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///////////////////////////////////////////////////////////////////////////
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#ifndef QSPIFLASHSIM_H
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#define QSPIFLASHSIM_H
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#define QSPIF_WIP_FLAG                  0x0001
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#define QSPIF_WEL_FLAG                  0x0002
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#define QSPIF_DEEP_POWER_DOWN_FLAG      0x0200
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class   QSPIFLASHSIM {
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        typedef enum {
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                QSPIF_IDLE,
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                QSPIF_QUAD_READ_IDLE,
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                QSPIF_RDSR,
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                QSPIF_RDCR,
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                QSPIF_WRSR,
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                QSPIF_CLSR,
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                QSPIF_RDID,
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                QSPIF_RELEASE,
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                QSPIF_FAST_READ,
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                QSPIF_QUAD_READ_CMD,
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                QSPIF_QUAD_READ,
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                QSPIF_SECTOR_ERASE,
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                QSPIF_PP,
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                QSPIF_QPP,
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                QSPIF_BULK_ERASE,
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                QSPIF_DEEP_POWER_DOWN,
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                QSPIF_INVALID
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        } QSPIF_STATE;
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        QSPIF_STATE     m_state;
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        char            *m_mem, *m_pmem;
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        int             m_last_sck;
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        unsigned        m_write_count, m_ireg, m_oreg, m_sreg, m_addr,
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                        m_count, m_config, m_mode_byte, m_creg;
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        bool            m_quad_mode, m_debug;
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public:
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        QSPIFLASHSIM(void);
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        void    load(const char *fname) { load(0, fname); }
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        void    load(const unsigned addr, const char *fname);
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        void    debug(const bool dbg) { m_debug = dbg; }
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        bool    debug(void) const { return m_debug; }
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        int     operator()(const int csn, const int sck, const int dat);
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};
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#endif

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