URL
https://opencores.org/ocsvn/s6soc/s6soc/trunk
[/] [s6soc/] [trunk/] [sw/] [dev/] [cmod.ld] - Blame information for rev 18
Go to most recent revision |
Details |
Compare with Previous |
View Log
Line No. |
Rev |
Author |
Line |
1 |
12 |
dgisselq |
/*******************************************************************************
|
2 |
|
|
*
|
3 |
|
|
* Filename: zipcmod.x
|
4 |
|
|
*
|
5 |
|
|
* Project: Cmod S6 ZipCPU demonstration
|
6 |
|
|
*
|
7 |
|
|
* Purpose: This script provides a description of the Cmod S6 Zip CPU
|
8 |
|
|
* build for the purposes of where to place memory when linking.
|
9 |
|
|
*
|
10 |
|
|
* Creator: Dan Gisselquist, Ph.D.
|
11 |
|
|
* Gisselquist Technology, LLC
|
12 |
|
|
*
|
13 |
|
|
********************************************************************************
|
14 |
|
|
*
|
15 |
|
|
* Copyright (C) 2016, Gisselquist Technology, LLC
|
16 |
|
|
*
|
17 |
|
|
* This program is free software (firmware): you can redistribute it and/or
|
18 |
|
|
* modify it under the terms of the GNU General Public License as published
|
19 |
|
|
* by the Free Software Foundation, either version 3 of the License, or (at
|
20 |
|
|
* your option) any later version.
|
21 |
|
|
*
|
22 |
|
|
* This program is distributed in the hope that it will be useful, but WITHOUT
|
23 |
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
|
24 |
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
25 |
|
|
* for more details.
|
26 |
|
|
*
|
27 |
|
|
* License: GPL, v3, as defined and found on www.gnu.org,
|
28 |
|
|
* http://www.gnu.org/licenses/gpl.html
|
29 |
|
|
*
|
30 |
|
|
*
|
31 |
|
|
*******************************************************************************/
|
32 |
|
|
|
33 |
|
|
ENTRY(_start)
|
34 |
|
|
|
35 |
|
|
MEMORY
|
36 |
|
|
{
|
37 |
|
|
blkram (wx) : ORIGIN = 0x002000, LENGTH = 0x001000
|
38 |
|
|
flash (rx) : ORIGIN = 0x400000, LENGTH = 0x400000
|
39 |
|
|
}
|
40 |
|
|
|
41 |
|
|
_top_of_stack = ORIGIN(blkram) + LENGTH(blkram) - 1;
|
42 |
|
|
|
43 |
|
|
SECTIONS
|
44 |
|
|
{
|
45 |
|
|
. = 0x0480000;
|
46 |
|
|
.rocode 0x0480000 : { *(.start) *(.text)
|
47 |
|
|
*(.rodata)
|
48 |
|
|
*(.strings) } > flash
|
49 |
|
|
.data : { *(.data) *(COMMON) *(.bss) } > blkram
|
50 |
|
|
_top_of_heap = .;
|
51 |
|
|
}
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.