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dgisselq |
////////////////////////////////////////////////////////////////////////////////
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//
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// Filename: deppbus.cpp
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//
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// Project: CMod S6 System on a Chip, ZipCPU demonstration project
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//
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// Purpose: This is a *very* simple Depp to Wishbone driver conversion.
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// Look in devbus.cpp for a description of how to use the driver.
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//
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// The driver is simple: there are 9 registers of interest to run this
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// driver. The first four registers, 0-3, are address registers, MSB
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// first. Place your 32-bit address into these registers. The next four
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// registers, 4-7, are data registers. If writing data, place the data
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// to write into these registers. The last register, 16, is a strobe
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// register. Write a 1 to read, and a 3 to write, to this register. A
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// bus transaction will then take place. Once completed, registers 4-7
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// will contain the resulting data.
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//
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// That's the internal workings of this driver. The above description is
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// accomplished in the readio() and writeio() routines.
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//
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// This is *not* a fully featured DEVBUS class--it does not support
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// pipelined reads or writes. It does not support compression. It does,
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// however, support reading and writing a simple 32-bit wishbone bus.
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// That is good enough, of itself, for now.
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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#include <stdlib.h>
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#include <stdio.h>
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#include "dpcdecl.h"
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#include "dmgr.h"
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#include "depp.h"
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#include "deppbus.h"
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DEPPBUS::DEPPBUS(char *szSel) {
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if (!DmgrOpen(&m_dev, szSel)) {
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fprintf(stderr, "Open failed!\n");
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exit(EXIT_FAILURE);
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}
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if (!DeppEnable(m_dev)) {
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fprintf(stderr, "Could not enable DEPP interface\n");
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exit(EXIT_FAILURE);
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}
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m_int = false, m_err = false;
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}
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DEPPBUS::~DEPPBUS(void) {
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if (m_dev)
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DmgrClose(m_dev);
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m_dev = 0;
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}
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void DEPPBUS::kill(void) { close(); }
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void DEPPBUS::close(void) { DmgrClose(m_dev); m_dev = 0; }
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void DEPPBUS::depperr(void) {
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ERC erc = DmgrGetLastError();
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if (erc != ercNoErc) {
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char scode[cchErcMax], msg[cchErcMsgMax];
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DmgrSzFromErc(erc,scode,msg);
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fprintf(stderr, "ErrCode : %s\n", scode);
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fprintf(stderr, "ErrMessage: %s\n", msg);
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close();
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exit(EXIT_FAILURE);
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}
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}
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void DEPPBUS::writeio(const BUSW a, const BUSW v) {
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bool good = true;
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// Set the address for our data
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good = good && DeppPutReg(m_dev, 0, (a>>24)&0x0ff, false);
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good = good && DeppPutReg(m_dev, 1, (a>>16)&0x0ff, false);
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good = good && DeppPutReg(m_dev, 2, (a>> 8)&0x0ff, false);
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good = good && DeppPutReg(m_dev, 3, a &0x0ff, false);
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if (!good) {
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fprintf(stderr, "BUS CYCLE FAILED\n");
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depperr(); close();
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exit(EXIT_FAILURE);
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}
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// Set the data to be transmitted
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good = good && DeppPutReg(m_dev, 4, (v>>24)&0x0ff, false);
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good = good && DeppPutReg(m_dev, 5, (v>>16)&0x0ff, false);
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good = good && DeppPutReg(m_dev, 6, (v>> 8)&0x0ff, false);
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good = good && DeppPutReg(m_dev, 7, v &0x0ff, false);
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if (!good) {
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fprintf(stderr, "BUS CYCLE FAILED\n");
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depperr(); close();
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exit(EXIT_FAILURE);
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}
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// Perform the operation
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good = good && DeppPutReg(m_dev,16, 0x3, false);
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if (!good) {
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fprintf(stderr, "BUS CYCLE FAILED\n");
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depperr(); close();
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exit(EXIT_FAILURE);
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}
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// Now, let's check for any bus errors and/or interrupts
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BYTE retn;
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good = good && DeppGetReg(m_dev,16, &retn, false);
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m_err = m_err | (retn&1);
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m_int = m_int | (retn&2);
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if (!good) {
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fprintf(stderr, "BUS CYCLE FAILED\n");
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depperr(); close();
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exit(EXIT_FAILURE);
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}
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if (m_err)
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throw BUSERR(a);
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}
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DEVBUS::BUSW DEPPBUS::readio(const DEVBUS::BUSW a) {
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BUSW v = 0;
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BYTE retn;
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bool good = true;
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// Set the address for our data
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good = good && DeppPutReg(m_dev, 0, (a>>24)&0x0ff, false);
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good = good && DeppPutReg(m_dev, 1, (a>>16)&0x0ff, false);
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good = good && DeppPutReg(m_dev, 2, (a>> 8)&0x0ff, false);
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good = good && DeppPutReg(m_dev, 3, a &0x0ff, false);
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if (!good) {
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fprintf(stderr, "BUS CYCLE FAILED\n");
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depperr(); close();
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exit(EXIT_FAILURE);
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}
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// Run the bus cycle
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good = good && DeppPutReg(m_dev,16, 0x1, false);
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if (!good) {
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fprintf(stderr, "BUS CYCLE FAILED\n");
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depperr(); close();
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exit(EXIT_FAILURE);
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}
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// Check for any bus errors and/or interrupts
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good = good && DeppGetReg(m_dev,16, &retn, false);
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if (!good) {
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fprintf(stderr, "BUS CYCLE FAILED\n");
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depperr(); close();
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exit(EXIT_FAILURE);
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}
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m_err = m_err | (retn&1);
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m_int = m_int | (retn&2);
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if (m_err)
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throw BUSERR(a);
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// Otherwise let's get our result
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good = good && DeppGetReg(m_dev, 4, &retn, false); v = (retn & 0x0ff);
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good = good && DeppGetReg(m_dev, 5, &retn, false); v = (v<<8)|(retn & 0x0ff);
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good = good && DeppGetReg(m_dev, 6, &retn, false); v = (v<<8)|(retn & 0x0ff);
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good = good && DeppGetReg(m_dev, 7, &retn, false); v = (v<<8)|(retn & 0x0ff);
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if (!good) {
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fprintf(stderr, "BUS CYCLE FAILED\n");
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depperr(); close();
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exit(EXIT_FAILURE);
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}
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return v;
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}
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void DEPPBUS::readi(const BUSW a, const int len, BUSW *buf) {
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for(int i=0; i<len; i++)
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buf[i] = readio(a+i);
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} void DEPPBUS::readz(const BUSW a, const int len, BUSW *buf) {
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for(int i=0; i<len; i++)
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buf[i] = readio(a);
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}
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void DEPPBUS::writei(const BUSW a, const int len, const BUSW *buf) {
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for(int i=0; i<len; i++)
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writeio(a+i, buf[i]);
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} void DEPPBUS::writez(const BUSW a, const int len, const BUSW *buf) {
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for(int i=0; i<len; i++)
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writeio(a, buf[i]);
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}
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bool DEPPBUS::poll(void) {
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if (m_int)
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return true;
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// Check for any bus errors and/or interrupts
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BYTE retn;
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DeppGetReg(m_dev,16, &retn, false);
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m_err = m_err | (retn&1);
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m_int = m_int | (retn&2);
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if (m_int)
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return true;
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return false;
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} void DEPPBUS::usleep(unsigned msec) {
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if (!poll())
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usleep(msec);
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} void DEPPBUS::wait(void) {
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while(!poll())
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usleep(5);
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} bool DEPPBUS::bus_err(void) const {
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return m_err;
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} void DEPPBUS::reset_err(void) {
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m_err = false;
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} void DEPPBUS::clear(void) {
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m_int = false;
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m_err = false;
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}
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