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dgisselq |
////////////////////////////////////////////////////////////////////////////////
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//
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// Filename: xpflashscop.cpp
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//
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// Project: CMod S6 System on a Chip, ZipCPU demonstration project
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//
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// Purpose: To test the QSPI Xpress flash interface, to see what it is doing
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// on the chip, and to create a VCD file matching the wires
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// determined/seen from the chip.
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <strings.h>
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#include <ctype.h>
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#include <string.h>
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#include <signal.h>
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#include <assert.h>
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#include "devbus.h"
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#ifdef SIMPLE_DEPPBUS
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# include "deppbus.h"
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#else
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# include "llcomms.h"
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# include "deppi.h"
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# include "ttybus.h"
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#endif
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// #include "port.h"
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#include "regdefs.h"
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#include "scopecls.h"
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#ifdef SIMPLE_DEPPBUS
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# define FPGAOPEN(SN) new DEPPBUS(SN);
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#else
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# define FPGAOPEN(SN) new FPGA(new DEPPI(SN))
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#endif
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FPGA *m_fpga;
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void closeup(int v) {
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m_fpga->kill();
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exit(0);
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}
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class XPFLASHSCOPE : public SCOPE {
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public:
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XPFLASHSCOPE(DEVBUS *fpga) : SCOPE(fpga, R_SCOPE, false, true) {
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define_traces();
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}
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// Inside our design, we have recorded 32-bits of information describing
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// what's going on. Here, we describe the names and widths of the
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// components of those 32-bits. These are used to create a VCD file
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// that can be loaded into GTKWave if necessary to see what's going on.
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virtual void define_traces(void) {
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register_trace("wb_cyc", 1, 31);
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register_trace("wb_stb", 1, 30);
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register_trace("flash_sel", 1, 29);
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register_trace("flctl_sel", 1, 28);
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register_trace("flash_ack", 1, 27);
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register_trace("flash_stall", 1, 26);
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register_trace("qspi_cs_n", 1, 25); // blank/unused bit next
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register_trace("qspi_sck", 2, 23);
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register_trace("qspi_mod", 2, 21);
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register_trace("o_qspi_dat", 4, 16);
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register_trace("i_qspi_dat", 4, 12);
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register_trace("flash_data", 12, 0);
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}
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// In case you aren't interested in creating a VCD file, we create an
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// output decoder, allowing you to "see" (textually) the output. This
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// is the default, although it may be ignored.
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virtual void decode(DEVBUS::BUSW v) const {
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printf("%3s%3s %3s%3s %3s%5s",
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((v>>31)&1)?"CYC":"",
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((v>>30)&1)?"STB":"",
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((v>>29)&1)?"SEL":"",
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((v>>28)&1)?"CTL":"",
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((v>>27)&1)?"ACK":"",
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((v>>26)&1)?"STALL":"");
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printf(" %2s[%d%d,%d] %x->%x ",
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((v>>25)&1)?"":"CS",
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((v>>24)&1), ((v>>23)&1),
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((v>>21)&3), // Mode
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((v>>16)&0xf),
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((v>>12)&0xf));
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printf("%03x", (v&0x0fff));
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}
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};
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int main(int argc, char **argv) {
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char szSel[64];
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// First step: connect to our FPGA.
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strcpy(szSel, S6SN);
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m_fpga = FPGAOPEN(szSel);
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// Second step: create a piece of software to read the scope off of the
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// FPGA device, and to decode it later.
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XPFLASHSCOPE *xpscope = new XPFLASHSCOPE(m_fpga);
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// Check if the scope is "ready". It will be "ready" when the scope
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// has been both primed, triggered, and stopped. If the scope hasn't
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// triggered, or hasn't stopped recording, you'll need to come back
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// later.
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if (xpscope->ready()) {
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// The scope is ready. Hence, it has a buffer filled with
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// the data we are looking for.
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// Read the data off of the scope, and print it to the screen
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xpscope->print();
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// Should you wish to, you may also create a .VCD file with the
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// scopes outputs within it.
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xpscope->writevcd("xpscope.vcd");
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} else {
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//
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// If the scope wasn't ready (yet) to be read, lets output
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// the state of the scope, so that we can tell what happened
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// or more specifically, what hasn't happened. (For example,
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// if the trigger hasn't gone off, then we need to wait longer
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// for it to go off.
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//
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xpscope->decode_control();
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}
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delete m_fpga;
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}
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