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https://opencores.org/ocsvn/s80186/s80186/trunk
[/] [s80186/] [trunk/] [fpga/] [leds/] [LEDSRegister.sv] - Blame information for rev 2
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// Copyright Jamie Iles, 2017
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//
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// This file is part of s80x86.
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//
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// s80x86 is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// s80x86 is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with s80x86. If not, see .
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module LEDSRegister(input logic clk,
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input logic reset,
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output logic [`CONFIG_NUM_LEDS-1:0] leds_val,
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input logic cs,
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input logic [15:0] data_m_data_in,
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input logic data_m_access,
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output logic data_m_ack,
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input logic data_m_wr_en,
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input logic [1:0] data_m_bytesel);
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always_ff @(posedge clk or posedge reset)
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if (reset)
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leds_val <= `CONFIG_NUM_LEDS'b0;
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else begin
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if (`CONFIG_NUM_LEDS > 8 && cs && data_m_access && data_m_bytesel[1]
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&& data_m_wr_en)
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leds_val[`CONFIG_NUM_LEDS-1:8] <= data_m_data_in[`CONFIG_NUM_LEDS-1:8];
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if (cs && data_m_access && data_m_bytesel[0] && data_m_wr_en)
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leds_val[7:0] <= data_m_data_in[7:0];
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end
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always_ff @(posedge clk)
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data_m_ack <= cs & data_m_access;
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endmodule
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