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jamieiles |
// Copyright Jamie Iles, 2017
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//
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// This file is part of s80x86.
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//
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// s80x86 is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// s80x86 is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with s80x86. If not, see .
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divf6_reg:
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width W8, a_sel RA, alu_op SELA, mdr_write, jmp do_div8;
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divf6_mem:
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width W8, segment DS, mem_read, jmp do_div8;
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do_div8:
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ra_sel AX;
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// Divisor in MDR, dividend in DX:TMP
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a_sel RA, alu_op SELA, tmp_wr_en;
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width W8, alu_op DIV;
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div8_complete:
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width W8, reg_wr_source QUOTIENT, rd_sel_source MICROCODE_RD_SEL, rd_sel AL;
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width W8, reg_wr_source REMAINDER, rd_sel_source MICROCODE_RD_SEL,
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rd_sel AH, next_instruction;
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divf7_reg:
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a_sel RA, alu_op SELA, mdr_write, ra_sel AX, jmp do_div16;
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divf7_mem:
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segment DS, mem_read, ra_sel AX, jmp do_div16;
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do_div16:
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// Divisor in MDR, dividend in DX:TMP
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a_sel RA, alu_op SELA, tmp_wr_en, ra_sel DX;
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ra_sel DX, alu_op DIV;
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div16_complete:
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reg_wr_source QUOTIENT, rd_sel_source MICROCODE_RD_SEL, rd_sel AX;
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reg_wr_source REMAINDER, rd_sel_source MICROCODE_RD_SEL, rd_sel DX,
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next_instruction;
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idivf6_reg:
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width W8, a_sel RA, alu_op SELA, mdr_write, jmp do_idiv8;
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idivf6_mem:
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width W8, segment DS, mem_read, jmp do_idiv8;
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do_idiv8:
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ra_sel AX;
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// divisor in MDR, dividend in DX:TMP
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a_sel RA, alu_op SELA, tmp_wr_en;
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width W8, alu_op IDIV, jmp div8_complete;
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idivf7_reg:
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a_sel RA, alu_op SELA, mdr_write, ra_sel AX, jmp do_idiv16;
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idivf7_mem:
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segment DS, mem_read, ra_sel AX, jmp do_idiv16;
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do_idiv16:
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// divisor in MDR, dividend in DX:TMP
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a_sel RA, alu_op SELA, tmp_wr_en, ra_sel DX;
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ra_sel DX, alu_op IDIV, jmp div16_complete;
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.at 0xd4;
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width W8, read_immed, ra_modrm_rm_reg, b_sel IMMEDIATE, alu_op SELB,
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mdr_write, jmp do_aam;
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.auto_address;
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do_aam:
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width W8, ra_sel AL;
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// divisor in MDR, dividend in DX:TMP
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a_sel RA, alu_op SELA, tmp_wr_en;
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width W8, alu_op DIV;
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width W8, reg_wr_source QUOTIENT, rd_sel_source MICROCODE_RD_SEL, rd_sel AH;
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width W8, reg_wr_source REMAINDER, rd_sel_source MICROCODE_RD_SEL,
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rd_sel AL;
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ra_sel AX;
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a_sel RA, b_sel IMMEDIATE, immediate 0x0, alu_op ADD,
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update_flags SF ZF PF, next_instruction;
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