OpenCores
URL https://opencores.org/ocsvn/s80186/s80186/trunk

Subversion Repositories s80186

[/] [s80186/] [trunk/] [rtl/] [microcode/] [loop.us] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 jamieiles
// Copyright Jamie Iles, 2017
2
//
3
// This file is part of s80x86.
4
//
5
// s80x86 is free software: you can redistribute it and/or modify
6
// it under the terms of the GNU General Public License as published by
7
// the Free Software Foundation, either version 3 of the License, or
8
// (at your option) any later version.
9
//
10
// s80x86 is distributed in the hope that it will be useful,
11
// but WITHOUT ANY WARRANTY; without even the implied warranty of
12
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
// GNU General Public License for more details.
14
//
15
// You should have received a copy of the GNU General Public License
16
// along with s80x86.  If not, see .
17
 
18
// LOOP
19
.at 0xe2;
20
    width W8, read_immed, jmp loop;
21
 
22
.auto_address;
23
loop:
24
    ra_sel CX;
25
    a_sel RA, b_sel IMMEDIATE, immediate 0x1, alu_op SUB,
26
        rd_sel_source MICROCODE_RD_SEL, rd_sel CX,
27
        rb_cl;
28
    jmp_rb_zero loop_not_taken;
29
    a_sel IP, b_sel IMMEDIATE, alu_op ADD, load_ip, next_instruction;
30
loop_not_taken:
31
    next_instruction;
32
 
33
// LOOPE
34
.at 0xe1;
35
    width W8, read_immed, jmp loope;
36
 
37
.auto_address;
38
loope:
39
    ra_sel CX;
40
    a_sel RA, b_sel IMMEDIATE, immediate 0x1, alu_op SUB,
41
        rd_sel_source MICROCODE_RD_SEL, rd_sel CX, rb_cl,
42
        jmp_if_zero loope_maybe_taken;
43
    jmp loop_not_taken;
44
loope_maybe_taken:
45
    jmp_rb_zero loop_not_taken;
46
    a_sel IP, b_sel IMMEDIATE, alu_op ADD, load_ip, next_instruction;
47
 
48
// LOOPNE
49
.at 0xe0;
50
    width W8, read_immed, jmp loopne;
51
 
52
.auto_address;
53
loopne:
54
    ra_sel CX;
55
    a_sel RA, b_sel IMMEDIATE, immediate 0x1, alu_op SUB,
56
        rd_sel_source MICROCODE_RD_SEL, rd_sel CX, rb_cl,
57
        jmp_if_zero loop_not_taken;
58
    jmp_rb_zero loop_not_taken;
59
loopne_taken:
60
    a_sel IP, b_sel IMMEDIATE, alu_op ADD, load_ip, next_instruction;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.