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jamieiles |
// Copyright Jamie Iles, 2017
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//
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// This file is part of s80x86.
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//
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// s80x86 is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// s80x86 is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with s80x86. If not, see .
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pop8f_reg:
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a_sel RA, alu_op SELA, mar_wr_sel Q, mar_write,
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segment_force, segment SS, jmp pop8f_reg_restore;
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pop8f_mem:
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a_sel RA, alu_op SELA, mar_wr_sel Q, mar_write,
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segment_force, segment SS, jmp pop8f_mem_restore;
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pop8f_reg_restore:
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segment_force, segment SS, mem_read, ra_sel SP;
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a_sel RA, b_sel IMMEDIATE, immediate 0x2, alu_op ADD,
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rd_sel SP, rd_sel_source MICROCODE_RD_SEL;
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a_sel MDR, alu_op SELA, rd_sel_source MODRM_RM_REG,
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next_instruction;
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pop8f_mem_restore:
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segment_force, segment SS, mem_read, ra_sel SP;
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a_sel RA, b_sel IMMEDIATE, immediate 0x2, alu_op ADD,
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rd_sel SP, rd_sel_source MICROCODE_RD_SEL;
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mar_write, mar_wr_sel EA, segment DS, jmp write_16_complete;
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#define POP_GPR(opcode, reg) \
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.at opcode; \
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ra_sel SP, jmp pop_gpr ## reg; \
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.auto_address; \
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pop_gpr ## reg: \
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a_sel RA, alu_op SELA, mar_wr_sel Q, mar_write, \
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segment_force, segment SS; \
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segment_force, segment SS, mem_read, ra_sel SP; \
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a_sel RA, b_sel IMMEDIATE, immediate 0x2, alu_op ADD, \
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rd_sel SP, rd_sel_source MICROCODE_RD_SEL; \
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a_sel MDR, alu_op SELA, rd_sel reg, \
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rd_sel_source MICROCODE_RD_SEL, next_instruction;
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#define POP_SR(opcode, reg) \
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.at opcode; \
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ra_sel SP, jmp pop_sr ## reg; \
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.auto_address; \
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pop_sr ## reg: \
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a_sel RA, alu_op SELA, mar_wr_sel Q, mar_write, \
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segment_force, segment SS; \
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segment_force, segment SS, mem_read, ra_sel SP; \
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a_sel RA, b_sel IMMEDIATE, immediate 0x2, alu_op ADD, \
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rd_sel SP, rd_sel_source MICROCODE_RD_SEL; \
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a_sel MDR, alu_op SELA, segment_force, segment reg, \
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segment_wr_en, ext_int_inhibit, next_instruction;
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POP_SR(0x07, ES)
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POP_SR(0x17, SS)
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POP_SR(0x1f, DS)
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POP_GPR(0x58, AX)
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POP_GPR(0x59, CX)
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POP_GPR(0x5a, DX)
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POP_GPR(0x5b, BX)
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POP_GPR(0x5c, SP)
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POP_GPR(0x5d, BP)
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POP_GPR(0x5e, SI)
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POP_GPR(0x5f, DI)
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.at 0x9d;
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ra_sel SP, jmp popf;
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.auto_address;
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popf:
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alu_op SELA, mar_wr_sel Q, mar_write, segment_force, segment SS;
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segment_force, segment SS, mem_read, ra_sel SP;
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a_sel RA, b_sel IMMEDIATE, immediate 0x2, alu_op ADD,
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rd_sel SP, rd_sel_source MICROCODE_RD_SEL;
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a_sel MDR, alu_op SETFLAGSA, update_flags CF PF AF ZF SF TF IF DF OF,
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next_instruction;
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